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    <title>i.MX ProcessorsのトピックRe: i.MX8M Plus UART Pin Muxing</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Plus-UART-Pin-Muxing/m-p/1661783#M206939</link>
    <description>&lt;P&gt;I don't believe it is tool issue or document issue.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Because it is daisy input for those pins.&amp;nbsp;&lt;/P&gt;&lt;P&gt;This is definition from BSP. Please note, the 0x600 address of daisy input register.&amp;nbsp;&lt;/P&gt;&lt;P&gt;linux-imx/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h&lt;/P&gt;&lt;P&gt;#define MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x238 0x498 0x600 0x0 0x8&lt;BR /&gt;#define MX8MP_IOMUXC_UART4_RXD__UART4_DTE_TX 0x238 0x498 0x000 0x0 0x0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Untitled.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/225841i1FD6ABD5B7964D52/image-size/large?v=v2&amp;amp;px=999" role="button" title="Untitled.png" alt="Untitled.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Untitled1.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/225842i3DF0947D641AD244/image-size/large?v=v2&amp;amp;px=999" role="button" title="Untitled1.png" alt="Untitled1.png" /&gt;&lt;/span&gt;&lt;/P&gt;</description>
    <pubDate>Thu, 01 Jun 2023 10:22:32 GMT</pubDate>
    <dc:creator>Mestkim</dc:creator>
    <dc:date>2023-06-01T10:22:32Z</dc:date>
    <item>
      <title>i.MX8M Plus UART Pin Muxing</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Plus-UART-Pin-Muxing/m-p/1608726#M202266</link>
      <description>&lt;P&gt;On the 8M Plus, the pin configurator show twice as many available pins for the UART signals then the pin mux table in the reference manual does.&amp;nbsp; So, which one is right and if the pin configurator is correct, then what are the ALT modes for the other pins that are not shown in the reference manual pin mux table?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Look at UART4 uart_rx as an example.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="robby_hill_0-1677790208870.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/213058iAC2DFED12898485D/image-size/medium?v=v2&amp;amp;px=400" role="button" title="robby_hill_0-1677790208870.png" alt="robby_hill_0-1677790208870.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="robby_hill_1-1677790208922.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/213059iA1E6EF8A450EF67F/image-size/medium?v=v2&amp;amp;px=400" role="button" title="robby_hill_1-1677790208922.png" alt="robby_hill_1-1677790208922.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 02 Mar 2023 20:50:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Plus-UART-Pin-Muxing/m-p/1608726#M202266</guid>
      <dc:creator>robby_hill</dc:creator>
      <dc:date>2023-03-02T20:50:21Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8M Plus UART Pin Muxing</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Plus-UART-Pin-Muxing/m-p/1612066#M202498</link>
      <description>&lt;P&gt;&lt;SPAN&gt;&lt;SPAN class=""&gt;Thanks for the finding!&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;BR /&gt;Seems it's pin config tool issue, &lt;SPAN&gt;&lt;SPAN class=""&gt;UARTn_RX signal is mux to both RX and TX signal, so does UARTn_TX.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN&gt;&lt;SPAN class=""&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN&gt;&lt;SPAN class=""&gt;Other interfaces seem don't have this kind of issue.&lt;BR /&gt;Will ask tool owner to update this.&lt;BR /&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 09 Mar 2023 03:03:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Plus-UART-Pin-Muxing/m-p/1612066#M202498</guid>
      <dc:creator>FrankLiu</dc:creator>
      <dc:date>2023-03-09T03:03:46Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8M Plus UART Pin Muxing</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Plus-UART-Pin-Muxing/m-p/1655161#M206299</link>
      <description>&lt;P&gt;Hi, Robby,&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; We double checked with the tool owner, here is the feedback.&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; The UART that I.MX8M Plus used can support both DTE and DCE modes, where the RX and TX signals can be intermixed, see the picture below.&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; When user is doing the pin selection, the UART mode configuration will also be chosen in DTS file, so the "doubled" option is correct.&amp;nbsp;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; Thanks!&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="FrankLiu_2-1684809987784.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/224306i85F27B9324E3845C/image-size/medium?v=v2&amp;amp;px=400" role="button" title="FrankLiu_2-1684809987784.png" alt="FrankLiu_2-1684809987784.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="FrankLiu_1-1684809865424.png" style="width: 572px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/224304i5BC15198EAC5B73F/image-dimensions/572x273?v=v2" width="572" height="273" role="button" title="FrankLiu_1-1684809865424.png" alt="FrankLiu_1-1684809865424.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;BR /&gt;Frank Liu&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 23 May 2023 02:52:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Plus-UART-Pin-Muxing/m-p/1655161#M206299</guid>
      <dc:creator>FrankLiu</dc:creator>
      <dc:date>2023-05-23T02:52:15Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8M Plus UART Pin Muxing</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Plus-UART-Pin-Muxing/m-p/1661783#M206939</link>
      <description>&lt;P&gt;I don't believe it is tool issue or document issue.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Because it is daisy input for those pins.&amp;nbsp;&lt;/P&gt;&lt;P&gt;This is definition from BSP. Please note, the 0x600 address of daisy input register.&amp;nbsp;&lt;/P&gt;&lt;P&gt;linux-imx/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h&lt;/P&gt;&lt;P&gt;#define MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x238 0x498 0x600 0x0 0x8&lt;BR /&gt;#define MX8MP_IOMUXC_UART4_RXD__UART4_DTE_TX 0x238 0x498 0x000 0x0 0x0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Untitled.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/225841i1FD6ABD5B7964D52/image-size/large?v=v2&amp;amp;px=999" role="button" title="Untitled.png" alt="Untitled.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Untitled1.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/225842i3DF0947D641AD244/image-size/large?v=v2&amp;amp;px=999" role="button" title="Untitled1.png" alt="Untitled1.png" /&gt;&lt;/span&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 01 Jun 2023 10:22:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Plus-UART-Pin-Muxing/m-p/1661783#M206939</guid>
      <dc:creator>Mestkim</dc:creator>
      <dc:date>2023-06-01T10:22:32Z</dc:date>
    </item>
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