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    <title>topic Re: Weim interface with sram issue in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Weim-interface-with-sram-issue/m-p/1656756#M206483</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;One can check weim signals with oscilloscope using&lt;/P&gt;
&lt;P&gt;sect.4.6.7.5 General WEIM Timing-Asynchronous Mode i.MX51 Datasheet &lt;BR /&gt;&lt;A href="http://www.nxp.com/docs/en/data-sheet/IMX51CEC.pdf" rel="nofollow noopener noreferrer" target="_blank"&gt;http://www.nxp.com/docs/en/data-sheet/IMX51CEC.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;for weim asynchronous access settings one can look at i.MX53 OBDS (..drivers/weimnor) &lt;BR /&gt;example, it has similar weim module&lt;BR /&gt;Lab and Test Software (2)&lt;BR /&gt;On-Board Diagnostic Suit for the i.MX53 Quick Start Board&lt;BR /&gt;&lt;A href="http://www.nxp.com/products/automotive-products/energy-power-management/pmics/power-management-for-i.mx-application-processors/i.mx53-quick-start-board:IMX53QSB?tab=Design_Tools_Tab" rel="nofollow noopener noreferrer" target="_blank"&gt;http://www.nxp.com/products/automotive-products/energy-power-management/pmics/power-management-for-i...&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;</description>
    <pubDate>Wed, 24 May 2023 14:48:28 GMT</pubDate>
    <dc:creator>Bio_TICFSL</dc:creator>
    <dc:date>2023-05-24T14:48:28Z</dc:date>
    <item>
      <title>Weim interface with sram issue</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Weim-interface-with-sram-issue/m-p/1656678#M206471</link>
      <description>&lt;P&gt;Hi ,&lt;/P&gt;&lt;P&gt;Iam working in SRAM through EIM interface in i.MX53 processor.when i read the value from devmem2 command,&lt;/P&gt;&lt;P&gt;I get 0xFFFFFFFF but when i write values to it like 0xAAAA5555 and then read it shows as 0xAAAAAAAAA&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;EM&gt;debian@arm:~$ sudo ./devmem2 0xF0000000 w 0xAAAA5555&lt;/EM&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;EM&gt;/dev/mem opened.&lt;/EM&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;EM&gt;Memory mapped at address 0xb6f15000.&lt;/EM&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;EM&gt;Value at address 0xF0000000 (0xb6f15000): 0x10101010&lt;/EM&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;EM&gt;Written 0xAAAA5555; readback 0xAAAAAAAA&lt;/EM&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;If I read the next value , it gives the previous value .For Example, if i read value for 0xF0000004, 0xF0000008 etc it shows value of F0000000 as 0xAAAAAAAA&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;EM&gt;&lt;STRONG&gt;debian@arm:~$ sudo ./devmem2 0xf0000004&lt;/STRONG&gt;&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;&lt;STRONG&gt;/dev/mem opened.&lt;/STRONG&gt;&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;&lt;STRONG&gt;Memory mapped at address 0xb6fc0000.&lt;/STRONG&gt;&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;&lt;STRONG&gt;Value at address 0xF0000004 (0xb6fc0004): 0xAAAAAAAA&lt;/STRONG&gt;&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;&lt;STRONG&gt;debian@arm:~$ &lt;/STRONG&gt;&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;&lt;STRONG&gt;debian@arm:~$ &lt;/STRONG&gt;&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;&lt;STRONG&gt;debian@arm:~$ &lt;/STRONG&gt;&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;&lt;STRONG&gt;debian@arm:~$ sudo ./devmem2 0xf0000008&lt;/STRONG&gt;&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;&lt;STRONG&gt;/dev/mem opened.&lt;/STRONG&gt;&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;&lt;STRONG&gt;Memory mapped at address 0xb6f39000.&lt;/STRONG&gt;&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;&lt;STRONG&gt;Value at address 0xF0000008 (0xb6f39008): 0xAAAAAAAA&lt;/STRONG&gt;&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;&lt;STRONG&gt;debian@arm:~$ &lt;/STRONG&gt;&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;Please suggest how to proceed&lt;/P&gt;&lt;P&gt;How to set clock for EIM?&lt;/P&gt;</description>
      <pubDate>Wed, 24 May 2023 13:04:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Weim-interface-with-sram-issue/m-p/1656678#M206471</guid>
      <dc:creator>syedr1</dc:creator>
      <dc:date>2023-05-24T13:04:56Z</dc:date>
    </item>
    <item>
      <title>Re: Weim interface with sram issue</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Weim-interface-with-sram-issue/m-p/1656756#M206483</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;One can check weim signals with oscilloscope using&lt;/P&gt;
&lt;P&gt;sect.4.6.7.5 General WEIM Timing-Asynchronous Mode i.MX51 Datasheet &lt;BR /&gt;&lt;A href="http://www.nxp.com/docs/en/data-sheet/IMX51CEC.pdf" rel="nofollow noopener noreferrer" target="_blank"&gt;http://www.nxp.com/docs/en/data-sheet/IMX51CEC.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;for weim asynchronous access settings one can look at i.MX53 OBDS (..drivers/weimnor) &lt;BR /&gt;example, it has similar weim module&lt;BR /&gt;Lab and Test Software (2)&lt;BR /&gt;On-Board Diagnostic Suit for the i.MX53 Quick Start Board&lt;BR /&gt;&lt;A href="http://www.nxp.com/products/automotive-products/energy-power-management/pmics/power-management-for-i.mx-application-processors/i.mx53-quick-start-board:IMX53QSB?tab=Design_Tools_Tab" rel="nofollow noopener noreferrer" target="_blank"&gt;http://www.nxp.com/products/automotive-products/energy-power-management/pmics/power-management-for-i...&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;</description>
      <pubDate>Wed, 24 May 2023 14:48:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Weim-interface-with-sram-issue/m-p/1656756#M206483</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2023-05-24T14:48:28Z</dc:date>
    </item>
    <item>
      <title>Re: Weim interface with sram issue</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Weim-interface-with-sram-issue/m-p/1659706#M206780</link>
      <description>&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;Thanks for the reply.&lt;/P&gt;&lt;P&gt;WE, CE2, RW pins works as expected when we read and write the data.&lt;/P&gt;&lt;P&gt;One more issue, If data is written to particular location ..Same data is written to remaining locations also.&lt;/P&gt;&lt;P&gt;Any suggestions would be helpful&lt;/P&gt;</description>
      <pubDate>Tue, 30 May 2023 08:41:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Weim-interface-with-sram-issue/m-p/1659706#M206780</guid>
      <dc:creator>syedr1</dc:creator>
      <dc:date>2023-05-30T08:41:10Z</dc:date>
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