topic Re: Help with using the octal flash on RT1160-EVK in i.MX Processors

Help with using the octal flash on RT1160-EVK

danielberhe — Tue, 16 May 2023 08:35:29 GMT

Hi All,

I'm trying to use the octal flash on the RT1160-EVK without much success.

I modified the resistors on the board as outlined in the Board User Manual. Have set SW1 to 0010, and SW2 to 0010000000.

I'm using a modified version of the example project evkmimxrt1160_flexspi_nor_edma_transfer_cm7 to test this. Changed the flash config in evkmimxrt1160_flexspi_nor_config.c following examples from https://community.nxp.com/t5/i-MX-RT/RT1170-EVK-Octal-Flash-not-usable/m-p/1249206.

The code compiles but never gets to main when I run it (see screenshot below):

Any idea where I'm going wrong? I've attached the MCUXpresso project.

Re: Help with using the octal flash on RT1160-EVK

kerryzhou — Wed, 17 May 2023 07:53:39 GMT

Hi @danielberhe ,

Don't worry, it is not difficult, please refer to my document, although it is for the RT1170, but RT1160 is the same situation:

https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/RT1170-Octal-flash-enablement/ta-p/1498369

You can try it at first.

If you meet any issues, please kindly let me know.

Best Regards,

Kerry

Re: Help with using the octal flash on RT1160-EVK

danielberhe — Wed, 17 May 2023 13:53:02 GMT

Hi Kerry,

Thank you for the link.

I've had partial success following the document you linked. Running fsl_romapi from RAM appears to work and I was able to get the flash information. Although the the Erase sector and page program bits fail.

No luck with debugging hello world app from octal flash. I've modified the flexspi_nor_config_t to resemble what is in the linked document. I regenerated the cfx file to include the flash reset pin. Below is the console output:

MCUXpresso IDE RedlinkMulti Driver v11.7 (Mar 22 2023 09:52:55 - crt_emu_cm_redlink build 13)
Found chip XML file in C:/Users/danbb/hello/Debug\MIMXRT1166xxxxx.xml
( 5) Remote configuration complete
Reconnected to existing LinkServer process.
============= SCRIPT: RT1160_connect_M7_wake_M4.scp =============
RT1160 Connect M7 and Wake M4 Script
DpID = 6BA02477
APID = 0x84770001
Setting M4 spin code
Setting M4 clock
Resetting M4 core
Releasing M4
View cores on the DAP AP
DpID = 6BA02477
TAP 0: 6BA02477 Core 0: M7 APID: 84770001 ROM Table: E00FD003*
TAP 0: 6BA02477 Core 1: M4 APID: 24770011 ROM Table: E00FF003
============= END SCRIPT ========================================
Probe Firmware: CMSIS-DAP (ARM)
Serial Number: 02440000020b708200000000000000000000000097969905
VID:PID: 0D28:0204
USB Path: \\?\hid#vid_0d28&pid_0204&mi_03#9&369fd963&0&0000#{4d1e55b2-f16f-11cf-88cb-001111000030}
Using memory from core 0 after searching for a good core
debug interface type = CoreSight DP (DAP DP ID 6BA02477) over SWD TAP 0
processor type = Cortex-M7 (CPU ID 00000C27) on DAP AP 0
number of h/w breakpoints = 8
number of flash patches = 0
number of h/w watchpoints = 4
Probe(0): Connected&Reset. DpID: 6BA02477. CpuID: 00000C27. Info: <None>
Debug protocol: SWD. RTCK: Disabled. Vector catch: Disabled.
Content of CoreSight Debug ROM(s):
RBASE E00FD000: CID B105100D PID 000008E88C ROM (type 0x1)
ROM 1 E00FE000: CID B105100D PID 04000BB4C8 ROM (type 0x1)
ROM 2 E00FF000: CID B105100D PID 04000BB4C7 ROM (type 0x1)
ROM 3 E000E000: CID B105E00D PID 04000BB00C Gen SCS (type 0x0)
ROM 3 E0001000: CID B105E00D PID 04000BB002 Gen DWT (type 0x0)
ROM 3 E0002000: CID B105E00D PID 04000BB00E Gen (type 0x0)
ROM 3 E0000000: CID B105E00D PID 04000BB001 Gen ITM (type 0x0)
ROM 2 E0041000: CID B105900D PID 04001BB975 CSt ARM ETMv4.0 type 0x13 Trace Source - Core
ROM 2 E0042000: CID B105900D PID 04004BB906 CSt type 0x14 Debug Control - Trigger, e.g. ECT
ROM 1 E0043000: CID B105900D PID 04001BB908 CSt CSTF type 0x12 Trace Link - Trace funnel/router
NXP: MIMXRT1166xxxxx
DAP stride is 1024 bytes (256 words)
Inspected v.2 External Flash Device on SPI using SFDP JEDEC ID C:\Users\danbb/iMXRT117x_FlexSPI_SFDP/builds/MIMXRT1160_SFDP_MXIC_OPI.cfx
Image 'iMXRT1170_SFDP_FlexSPI1_MXIC_OPI May 17 2023 10:35:18'
Opening flash driver C:\Users\danbb/iMXRT117x_FlexSPI_SFDP/builds/MIMXRT1160_SFDP_MXIC_OPI.cfx
Sending VECTRESET to run flash driver
flash driver polled mailbox (8 bytes at 0x2000A6D8) read failed (on poll 1/301) - retrying after 1ms - rc Em(12). Target rejected debug access at location 0x00000000
AFTER driver startup timeout (302 5ms retries)
Driver Addresses
Start: 20000000
Entry: 20000035
End: 200006C8
Stack: 200026C8
Mailbox:2000A6C8
Driver Register State
R0: 40CAC0B0
R1: 0A000000
R2: 80000000
R3: 0000F000
R4: E000ED00
R5: 0022946D
R6: 001640CD
R7: 00207DC8
R8: 2024AE80
R9: 2024AE84
R10: 00211C0C
R11: 000000F0
R12: 00000000
SP: 20241D98
LR: 002015F3
PC: 00223104
xPSR: 81000000
MSP: 20241D98
PSP: 00000000
CFBP: 00000001 (CONTROL=0x0, FAULTMASK=0x0, BASEPRI=0x0, PRIMASK=0x1)
Flash Driver V.2 startup failed - rc Ef(34): Timed-out initializing flash.
chip initialization failed - Ef(34): Timed-out initializing flash.
failed to initialize flash driver C:\Users\danbb/iMXRT117x_FlexSPI_SFDP/builds/MIMXRT1160_SFDP_MXIC_OPI.cfx

Regards,

Daniel

Re: Help with using the octal flash on RT1160-EVK

kerryzhou — Thu, 18 May 2023 04:54:49 GMT

Hi @danielberhe ,

Which debugger you are using now?

As you also need the related flashloader file, different debugger is using the different flashloader.

CMSIS DAP is using the .cfx, JLINK, I suggest you use the RT-UFL.

If you use the .cfx, do you try my chapter 4. CMSIS DAP Flashloader

Do you generate the .cfx file again?

Best Regards,

Kerry

Re: Help with using the octal flash on RT1160-EVK

danielberhe — Thu, 18 May 2023 10:02:48 GMT

Hi Kerry,

I'm using the DAP flashloader and yes, I did follow section 4 of the document and regenerated the .cfx. I then used that .cfx by updating my project in properties->C/C++ Build->MCU settings.

Regards,

Daniel

Re: Help with using the octal flash on RT1160-EVK

kerryzhou — Fri, 19 May 2023 03:19:59 GMT

Hi @danielberhe ,

Share your modified .cfx to me, when I have time, I will test it on my side.

BTW, you can modify your on board EVK debugger to the JLINK, then try the RT-UFL, whether that method works or not?

You can firmware the on board debugger to JLINK with the LPCScrypt:

https://www.nxp.com/lpcscrypt

Please try it on your side, the RT-UFL, you can use my doc mentioned file.

Best Regards,

Kerry

Re: Help with using the octal flash on RT1160-EVK

skanda19 — Wed, 30 Apr 2025 22:07:50 GMT

Hello @kerryzhou,

I been trying to do the same with the rt600 on a custom evk runnning on flexspi port A Octal.

By following your note on the rt1170, I was able to get to the point where in the IDE seems to do a successful operation when I flash it with the RT UFL algo. But is not actually flashing.

Also, I get this error when I try to erase memory with j-commander :

To what I believe is that RT algorithm needs to support octal and I need to enable it. Can you give some detail on how to do this with the rt600 ?

Thanks!