SPI chip select configuration in IMX8M Nano processor

Maishalini — Tue, 09 May 2023 06:32:22 GMT

In IMX8M Nano processor (MIMX8MN5DVTJZAA ) it is possible to configure any GPIO pin for SPI Chip select ?

Re: SPI chip select configuration in IMX8M Nano processor

Sanket_Parekh — Tue, 09 May 2023 11:50:07 GMT

Hello @Maishalini ,

I hope you are doing well.

->One just needs to change the IOMUX setting for the SPI's CS pin to the GPIO pin.
->Please refer to this location in the linux source code to do the changes for the same.
<Linux_src_code>/Documentation/devicetree/bindings/spi

->One can refer to this link for reference to do pin configuration.
https://community.nxp.com/t5/i-MX-Processors/Native-chip-select-support-on-spi-fsl-lpspi-c/m-p/1011548

->I have shared an example for reference one can refer to that too.
&ecspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
status = "okay";
cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>, <&gpio3 2 GPIO_ACTIVE_LOW>;
#address-cells = <1>;
#size-cells = <0>;

spidev: spidev@0 {
compatible = "spidev";
status = "okay";
spi-max-frequency = <5000000>;
reg = <0>;
};
};

I hope this information helps you!

Thanks & Regards,

Sanket Parekh

topic Re: SPI chip select configuration in IMX8M Nano processor in i.MX Processors

SPI chip select configuration in IMX8M Nano processor

Re: SPI chip select configuration in IMX8M Nano processor