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    <title>topic Initial iMX93 Questions in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Initial-iMX93-Questions/m-p/1646406#M205443</link>
    <description>&lt;P&gt;&lt;SPAN&gt;1) Need propagation delay values for the LPDDR4 lines (or all) for 11x11 IMX93 package. &amp;nbsp; Using Altium for the project. &amp;nbsp; Required as we prepare to tune the LPDDR4 traces. &amp;nbsp;Did not see this in the IBIS Model.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;2) Is there an app-note like 8MN_HDG_LPDDR4 for the IMX93? &amp;nbsp;This app note gives some helpful guidance for the iMX&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;8M Nano design using LPDDR4. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;3) Also would like a recommended&amp;nbsp;pad diameter and solder mask expansion for the 11x11 package. &amp;nbsp;Or at least what was used for the IMX93 eval kits. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;4) Also we have contacted Micron to get propagation delay values for the MT53E1G16D1FW-046 AAT:A. &amp;nbsp; If you have these available, it would also be helpful.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;5) Another question concerning the EVK. &amp;nbsp;It does not appear that the data lines are tuned. &amp;nbsp;for example DRAM_DATA14_A. &amp;nbsp;Is this correct?&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Mon, 08 May 2023 12:51:23 GMT</pubDate>
    <dc:creator>ABuskirk</dc:creator>
    <dc:date>2023-05-08T12:51:23Z</dc:date>
    <item>
      <title>Initial iMX93 Questions</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Initial-iMX93-Questions/m-p/1646406#M205443</link>
      <description>&lt;P&gt;&lt;SPAN&gt;1) Need propagation delay values for the LPDDR4 lines (or all) for 11x11 IMX93 package. &amp;nbsp; Using Altium for the project. &amp;nbsp; Required as we prepare to tune the LPDDR4 traces. &amp;nbsp;Did not see this in the IBIS Model.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;2) Is there an app-note like 8MN_HDG_LPDDR4 for the IMX93? &amp;nbsp;This app note gives some helpful guidance for the iMX&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;8M Nano design using LPDDR4. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;3) Also would like a recommended&amp;nbsp;pad diameter and solder mask expansion for the 11x11 package. &amp;nbsp;Or at least what was used for the IMX93 eval kits. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;4) Also we have contacted Micron to get propagation delay values for the MT53E1G16D1FW-046 AAT:A. &amp;nbsp; If you have these available, it would also be helpful.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;5) Another question concerning the EVK. &amp;nbsp;It does not appear that the data lines are tuned. &amp;nbsp;for example DRAM_DATA14_A. &amp;nbsp;Is this correct?&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 08 May 2023 12:51:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Initial-iMX93-Questions/m-p/1646406#M205443</guid>
      <dc:creator>ABuskirk</dc:creator>
      <dc:date>2023-05-08T12:51:23Z</dc:date>
    </item>
    <item>
      <title>Re: Initial iMX93 Questions</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Initial-iMX93-Questions/m-p/1646559#M205461</link>
      <description>&lt;P&gt;Hello!&lt;/P&gt;
&lt;P&gt;1) Please refer to&amp;nbsp;Hardware Design Guide, chapter&amp;nbsp;3.6.6 i.MX 93 DDR package delays:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Alejandro_Salas_0-1683570674347.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/222195i8147A2A6010EA7DB/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Alejandro_Salas_0-1683570674347.png" alt="Alejandro_Salas_0-1683570674347.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;2) We have not a document as in IMX8MN yet, but again you can refer to IMX93 Hardware Design Guide in chapter&amp;nbsp;3.6.2 i.MX 93 LPDDR4/4X-3733 routing recommendations (Look for documentation in the &lt;A href="https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-9-processors/i-mx-93-applications-processor-family-arm-cortex-a55-ml-acceleration-power-efficient-mpu:i.MX93" target="_self"&gt;IMX93 page&lt;/A&gt;).&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;3)According to de Hardware Design Guide, the minimum pad diameter is 16 mil, please check the chapter 3.4.2&amp;nbsp;Manufacturing recommendation.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;4)Unfortunately we have not that documentation available.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;5)What do you refer with "tuned &lt;SPAN&gt;for example DRAM_DATA14_A&lt;/SPAN&gt;"?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 08 May 2023 19:16:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Initial-iMX93-Questions/m-p/1646559#M205461</guid>
      <dc:creator>Manuel_Salas</dc:creator>
      <dc:date>2023-05-08T19:16:40Z</dc:date>
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