<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Help in adding support for the i.MX8 chips to rustBoot in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Help-in-adding-support-for-the-i-MX8-chips-to-rustBoot/m-p/1623324#M203353</link>
    <description>&lt;P&gt;So, I managed to get this working. The container format is a 0x20 byte header with the following fields.&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;========= UNSIGNED WORKING DDR4 HEADER (OR) IVT =========
header.tag:       0xd1
header.length:    0x2000
header.version:   0x41
entry:            0x912000
reserved1:        0x00
dcd_ptr:          0x00
boot_data_ptr:    0x911fe0
self:             0x911fc0
csf:              0x93d9c0
reserved2:        0x0
boot_data.start:  0x911fc0
boot_data.size:   0x2da00
boot_data.plugin: 0x0&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;Btw, I found the information I was looking for in the i.MX8M mini's reference manual - &lt;STRONG&gt;section 6.1.6 Program image &lt;/STRONG&gt;(rather than the nano's).&lt;/P&gt;&lt;P&gt;PS: I put together a &lt;EM&gt;Rust&lt;/EM&gt; implementation for the nano along with a working &lt;U&gt;uart&lt;/U&gt; console. You can find the code &lt;A href="https://github.com/nihalpasham/rustBoot/tree/main/boards/bootloaders/imx8mn" target="_blank" rel="noopener"&gt;here&lt;/A&gt;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;Welcome to minicom 2.8

OPTIONS:
Compiled on Oct 25 2021, 04:59:49.
Port /dev/tty.usbserial-1101, 11:47:54

Press Meta-Z for help on special keys

[    0.000002] imx8mn-rs version 0.1.0
[    0.003485] Booting on: i.MX 8M Nano EVK
[    0.007385] Current privilege level: EL3
[    0.011295] Exception handling state:
[    0.014934]       Debug:  Masked
[    0.018143]       SError: Unmasked
[    0.021431]       IRQ:    Masked
[    0.024728]       FIQ:    Masked
[    0.027919] Drivers loaded:
[    0.030685]       1. i.MX 8M Nano Uart2
[    0.034428] Chars written: 388
[    0.037546] Counter Control Register: 259
[    0.041462]

[    0.042998]  ... wait forever&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Tue, 28 Mar 2023 11:38:32 GMT</pubDate>
    <dc:creator>npashi</dc:creator>
    <dc:date>2023-03-28T11:38:32Z</dc:date>
    <item>
      <title>Help in adding support for the i.MX8 chips to rustBoot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Help-in-adding-support-for-the-i-MX8-chips-to-rustBoot/m-p/1580637#M199901</link>
      <description>&lt;P&gt;I'd like to add support for the i.MX8 chips to &lt;A href="https://github.com/nihalpasham/rustBoot" target="_self"&gt;rustBoot&lt;/A&gt; and I'm hoping you could point me in the right direction w.r.t the following questions.&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;documentation on NXP's i.MX8 container formats is sparse. Where can I find details on '&lt;STRONG&gt;&lt;EM&gt;container-layouts&lt;/EM&gt;&lt;/STRONG&gt;' i.e. which bytes mean what and what makes-up a &lt;STRONG&gt;valid&lt;/STRONG&gt; &lt;STRONG&gt;container&lt;/STRONG&gt;.&lt;/LI&gt;&lt;LI&gt;do we have a tool (of some sort) that can be used to inspect arbitrary containers.&lt;/LI&gt;&lt;LI&gt;I was also wondering if someone could help me understand the i.MX8 boot-flow. In this case, I'm referring to the &lt;U&gt;i.MX8M Nano&lt;/U&gt;, assuming secure-boot is &lt;STRONG&gt;not&lt;/STRONG&gt; enabled&lt;BR /&gt;&lt;OL&gt;&lt;LI&gt;SCU ROM code loads &lt;EM&gt;SCU-firmware&lt;/EM&gt; into SCU-TCM and loads &lt;EM&gt;m4 and cortex-a app-firmware&lt;/EM&gt; i.e. next-stage bootloader into SRAM from addresses/locations specified in the corresponding i.MX8 container.&lt;/LI&gt;&lt;LI&gt;The SCU firmware is initialized and starts the ARM Cortex-M and Cortex-A cores&lt;/LI&gt;&lt;LI&gt;SCU firmware then passes execution-control of cortex-a to the next-stage bootloader.&lt;/LI&gt;&lt;LI&gt;In the case of the `nano`, we have to additionally train ddr4 memory and initialize or set-up DRAM.&lt;/LI&gt;&lt;LI&gt;which then passes control to whatever comes next.&lt;/LI&gt;&lt;LI&gt;Am I missing anything?&lt;/LI&gt;&lt;/OL&gt;&lt;/LI&gt;&lt;/OL&gt;</description>
      <pubDate>Wed, 11 Jan 2023 08:04:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Help-in-adding-support-for-the-i-MX8-chips-to-rustBoot/m-p/1580637#M199901</guid>
      <dc:creator>npashi</dc:creator>
      <dc:date>2023-01-11T08:04:05Z</dc:date>
    </item>
    <item>
      <title>Re: Help in adding support for the i.MX8 chips to rustBoot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Help-in-adding-support-for-the-i-MX8-chips-to-rustBoot/m-p/1623324#M203353</link>
      <description>&lt;P&gt;So, I managed to get this working. The container format is a 0x20 byte header with the following fields.&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;========= UNSIGNED WORKING DDR4 HEADER (OR) IVT =========
header.tag:       0xd1
header.length:    0x2000
header.version:   0x41
entry:            0x912000
reserved1:        0x00
dcd_ptr:          0x00
boot_data_ptr:    0x911fe0
self:             0x911fc0
csf:              0x93d9c0
reserved2:        0x0
boot_data.start:  0x911fc0
boot_data.size:   0x2da00
boot_data.plugin: 0x0&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;Btw, I found the information I was looking for in the i.MX8M mini's reference manual - &lt;STRONG&gt;section 6.1.6 Program image &lt;/STRONG&gt;(rather than the nano's).&lt;/P&gt;&lt;P&gt;PS: I put together a &lt;EM&gt;Rust&lt;/EM&gt; implementation for the nano along with a working &lt;U&gt;uart&lt;/U&gt; console. You can find the code &lt;A href="https://github.com/nihalpasham/rustBoot/tree/main/boards/bootloaders/imx8mn" target="_blank" rel="noopener"&gt;here&lt;/A&gt;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;Welcome to minicom 2.8

OPTIONS:
Compiled on Oct 25 2021, 04:59:49.
Port /dev/tty.usbserial-1101, 11:47:54

Press Meta-Z for help on special keys

[    0.000002] imx8mn-rs version 0.1.0
[    0.003485] Booting on: i.MX 8M Nano EVK
[    0.007385] Current privilege level: EL3
[    0.011295] Exception handling state:
[    0.014934]       Debug:  Masked
[    0.018143]       SError: Unmasked
[    0.021431]       IRQ:    Masked
[    0.024728]       FIQ:    Masked
[    0.027919] Drivers loaded:
[    0.030685]       1. i.MX 8M Nano Uart2
[    0.034428] Chars written: 388
[    0.037546] Counter Control Register: 259
[    0.041462]

[    0.042998]  ... wait forever&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 28 Mar 2023 11:38:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Help-in-adding-support-for-the-i-MX8-chips-to-rustBoot/m-p/1623324#M203353</guid>
      <dc:creator>npashi</dc:creator>
      <dc:date>2023-03-28T11:38:32Z</dc:date>
    </item>
  </channel>
</rss>

