i.MX ProcessorsのトピックRe: [iMX8MP] Clock registration failure

[iMX8MP] Clock registration failure

khang_letruong — Wed, 15 Mar 2023 07:05:30 GMT

Dear Community,

During the booting of my custom board based on the iMX8MP DDR4 EVK, there;s following errors :

[ 0.163278] samsung-hdmi-phy 32fdff00.hdmiphy: failed to get phy apb clk: -517 [ 0.163425] imx8-pcie-phy 32f00000.pcie-phy: failed to get imx pcie phy clock [ 0.168035] EINJ: ACPI disabled. [ 0.172502] i.MX clk 324: register failed with -2 [ 0.172512] i.MX clk 325: register failed with -2 [ 0.172517] i.MX clk 326: register failed with -2 [ 0.172522] i.MX clk 328: register failed with -2 [ 0.172527] i.MX clk 329: register failed with -2 [ 0.172532] i.MX clk 330: register failed with -2 [ 0.178265] imx-sdma 30bd0000.dma-controller: Direct firmware load for imx/sdma/sdma-imx7d.bin failed with error -2 [ 0.178276] imx-sdma 30bd0000.dma-controller: Falling back to sysfs fallback for: imx/sdma/sdma-imx7d.bin

I wonder what are clk 324 to 330 relevant to and would the failure cause any issue of certain peripheral, please ?

I am using BSP LF5.10.52-2.1.0. Full log is in attachment.

Thanks in advance and best regards,
Khang

Re: [iMX8MP] Clock registration failure

Sanket_Parekh — Fri, 17 Mar 2023 11:12:53 GMT

Hello @khang_letruong

I hope you are doing well.

I have a few queries to ask.

[ 0.163278] samsung-hdmi-phy 32fdff00.hdmiphy: failed to get phy apb clk: -517
[ 0.163425] imx8-pcie-phy 32f00000.pcie-phy: failed to get imx pcie phy clock

->As from the logs it's seen that hdmi failed to get phy apb clk, please check if the problem is related to this clock or not, if so then please check the clock setting in RM section.

I have a few queries to ask

1)have you connected any display on hdmi port?
Please make sure all the connections are well-defined.
One can refer to the RM for display-HDMI connection.
https://www.nxp.com/webapp/Download?colCode=IMX8MPRM

2)have you set the clock configurations as mentioned at the below-given location?
one can take reference for the value of properties that should be st from the below location.
<src_code>/Documentation/devicetree/bindings/display/msm/hdmi.txt

Thanks & Regards.

Sanket Parekh

Re: [iMX8MP] Clock registration failure

khang_letruong — Fri, 17 Mar 2023 12:14:15 GMT

Hi @Sanket_Parekh ,

To confirm, the HDMI display works well (I did not check the sound, however) despite following error :

[ 0.163278] samsung-hdmi-phy 32fdff00.hdmiphy: failed to get phy apb clk: -517 [ 0.163425] imx8-pcie-phy 32f00000.pcie-phy: failed to get imx pcie phy clock

What I was interested in was the rest :

[ 0.172502] i.MX clk 324: register failed with -2 [ 0.172512] i.MX clk 325: register failed with -2 [ 0.172517] i.MX clk 326: register failed with -2 [ 0.172522] i.MX clk 328: register failed with -2 [ 0.172527] i.MX clk 329: register failed with -2 [ 0.172532] i.MX clk 330: register failed with -2

From the source code, I learnt that clk 324 to 330 were :

#define IMX8MP_SAI1_MCLK 324 #define IMX8MP_SAI2_MCLK 325 #define IMX8MP_SAI3_MCLK 326 #define IMX8MP_SAI4_MCLK 327 #define IMX8MP_SAI5_MCLK 328 #define IMX8MP_SAI6_MCLK 329 #define IMX8MP_SAI7_MCLK 330

And I saw your answer in the Technical Support case. I do hope that these errors do not cause any issue with any element of following pipeline : Camera sensor --> MIPI-CSI2 --> ISP.

Best Regards,
Khang

Re: [iMX8MP] Clock registration failure

Sanket_Parekh — Mon, 20 Mar 2023 09:06:05 GMT

Hello @khang_letruong

I hope you are doing well.

->I do hope that these errors do not cause any issue with any element of following pipeline : Camera sensor --> MIPI-CSI2 --> ISP.
-Yes, it does not cause any issue with any element of the above pipeline

Thanks & Regards.

Sanket Parekh