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    <title>topic how to test spi with DMA in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/how-to-test-spi-with-DMA/m-p/1613768#M202621</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I wonder about how I can aware of DMA properties, how I can show that the DMA is active?&lt;/P&gt;&lt;P&gt;We have development board base on imx8mp and in user manuals it says as follows:&lt;/P&gt;&lt;P&gt;6.8 SPI Bus&lt;BR /&gt;MSC SM2S-IMX8PLUS SMARC™ offers two Enhanced Configurable SPI (ECSPI) busses with two slave-select signals each.&lt;BR /&gt;Key features of the ECSPI include:&lt;BR /&gt;• Full-duplex synchronous serial interface&lt;BR /&gt;• Master/Slave configurable&lt;BR /&gt;• Two Chip Select (CS) signals to support multiple peripherals&lt;BR /&gt;• Transfer continuation function allows unlimited length data transfers&lt;BR /&gt;• 32-bit wide by 64-entry FIFO for both transmit and receive data&lt;BR /&gt;• Polarity and phase of the Chip Select (CS) and SPI Clock (SCLK) are configurable&lt;BR /&gt;&lt;FONT color="#FF0000"&gt;&lt;SPAN&gt;• Direct Memory Access (DMA) support&lt;/SPAN&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;And I have attached the .dts file to this message, I do not know how to activate DMA specification, also how to test weather it works via DMA specification. Could you give detail about it?&lt;/P&gt;&lt;P&gt;Thank you for your time and consideration,&lt;/P&gt;&lt;P&gt;Best Regards&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Mon, 13 Mar 2023 07:12:47 GMT</pubDate>
    <dc:creator>emr1</dc:creator>
    <dc:date>2023-03-13T07:12:47Z</dc:date>
    <item>
      <title>how to test spi with DMA</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/how-to-test-spi-with-DMA/m-p/1613768#M202621</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I wonder about how I can aware of DMA properties, how I can show that the DMA is active?&lt;/P&gt;&lt;P&gt;We have development board base on imx8mp and in user manuals it says as follows:&lt;/P&gt;&lt;P&gt;6.8 SPI Bus&lt;BR /&gt;MSC SM2S-IMX8PLUS SMARC™ offers two Enhanced Configurable SPI (ECSPI) busses with two slave-select signals each.&lt;BR /&gt;Key features of the ECSPI include:&lt;BR /&gt;• Full-duplex synchronous serial interface&lt;BR /&gt;• Master/Slave configurable&lt;BR /&gt;• Two Chip Select (CS) signals to support multiple peripherals&lt;BR /&gt;• Transfer continuation function allows unlimited length data transfers&lt;BR /&gt;• 32-bit wide by 64-entry FIFO for both transmit and receive data&lt;BR /&gt;• Polarity and phase of the Chip Select (CS) and SPI Clock (SCLK) are configurable&lt;BR /&gt;&lt;FONT color="#FF0000"&gt;&lt;SPAN&gt;• Direct Memory Access (DMA) support&lt;/SPAN&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;And I have attached the .dts file to this message, I do not know how to activate DMA specification, also how to test weather it works via DMA specification. Could you give detail about it?&lt;/P&gt;&lt;P&gt;Thank you for your time and consideration,&lt;/P&gt;&lt;P&gt;Best Regards&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 13 Mar 2023 07:12:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/how-to-test-spi-with-DMA/m-p/1613768#M202621</guid>
      <dc:creator>emr1</dc:creator>
      <dc:date>2023-03-13T07:12:47Z</dc:date>
    </item>
    <item>
      <title>Re: how to test spi with DMA</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/how-to-test-spi-with-DMA/m-p/1615608#M202770</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/207028"&gt;@emr1&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I hope you are doing well.&lt;/P&gt;
&lt;P&gt;There is no need to make change the device tree.&lt;BR /&gt;As dma properties for ecspi are already defined in imx8mp.dtsi as below.&lt;/P&gt;
&lt;P&gt;ecspi1: spi@30820000 {&lt;BR /&gt;#address-cells = &amp;lt;1&amp;gt;;&lt;BR /&gt;#size-cells = &amp;lt;0&amp;gt;;&lt;BR /&gt;compatible = "fsl,imx8mp-ecspi", "fsl,imx6ul-ecspi";&lt;BR /&gt;reg = &amp;lt;0x30820000 0x10000&amp;gt;;&lt;BR /&gt;interrupts = &amp;lt;GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH&amp;gt;;&lt;BR /&gt;clocks = &amp;lt;&amp;amp;clk IMX8MP_CLK_ECSPI1_ROOT&amp;gt;,&lt;BR /&gt;&amp;lt;&amp;amp;clk IMX8MP_CLK_ECSPI1_ROOT&amp;gt;;&lt;BR /&gt;clock-names = "ipg", "per";&lt;BR /&gt;assigned-clock-rates = &amp;lt;80000000&amp;gt;;&lt;BR /&gt;assigned-clocks = &amp;lt;&amp;amp;clk IMX8MP_CLK_ECSPI1&amp;gt;;&lt;BR /&gt;assigned-clock-parents = &amp;lt;&amp;amp;clk IMX8MP_SYS_PLL1_800M&amp;gt;;&lt;BR /&gt;dmas = &amp;lt;&amp;amp;sdma1 0 7 1&amp;gt;, &amp;lt;&amp;amp;sdma1 1 7 2&amp;gt;;&lt;BR /&gt;dma-names = "rx", "tx";&lt;BR /&gt;status = "disabled";&lt;BR /&gt;};&lt;/P&gt;
&lt;P&gt;By Default, Dma transfer is enabled in ecspi driver by use_dma kernel parameter in spi-imx.c driver.&lt;/P&gt;
&lt;P&gt;Dma mode is disabled in driver under some configurations (such as slavemode &amp;amp; transfer length). Please see spi_imx_can_dma() in spi-imx.c driver for such conditions.&lt;/P&gt;
&lt;P&gt;One can cross-check this by printing degugging information in kernel with highest log level and below kernel options.&lt;BR /&gt;CONFIG_SPI_DEBUG=y&lt;/P&gt;
&lt;P&gt;Thanks &amp;amp; Regards,&lt;/P&gt;
&lt;P&gt;Sanket Parekh&lt;/P&gt;</description>
      <pubDate>Wed, 15 Mar 2023 10:03:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/how-to-test-spi-with-DMA/m-p/1615608#M202770</guid>
      <dc:creator>Sanket_Parekh</dc:creator>
      <dc:date>2023-03-15T10:03:39Z</dc:date>
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