<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic imx8M_Plus_SOM pin reassignments in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/imx8M-Plus-SOM-pin-reassignments/m-p/1606297#M202075</link>
    <description>&lt;P&gt;I need to reassign some pins to create more GPIO.&amp;nbsp; I'm looking at the SA1 group. I've never done this before; never seen a device tree, etc.&amp;nbsp; I need help to accomplish this.&amp;nbsp; Thanks.&lt;/P&gt;</description>
    <pubDate>Mon, 27 Feb 2023 18:13:02 GMT</pubDate>
    <dc:creator>omordha</dc:creator>
    <dc:date>2023-02-27T18:13:02Z</dc:date>
    <item>
      <title>imx8M_Plus_SOM pin reassignments</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8M-Plus-SOM-pin-reassignments/m-p/1606297#M202075</link>
      <description>&lt;P&gt;I need to reassign some pins to create more GPIO.&amp;nbsp; I'm looking at the SA1 group. I've never done this before; never seen a device tree, etc.&amp;nbsp; I need help to accomplish this.&amp;nbsp; Thanks.&lt;/P&gt;</description>
      <pubDate>Mon, 27 Feb 2023 18:13:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8M-Plus-SOM-pin-reassignments/m-p/1606297#M202075</guid>
      <dc:creator>omordha</dc:creator>
      <dc:date>2023-02-27T18:13:02Z</dc:date>
    </item>
    <item>
      <title>Re: imx8M_Plus_SOM pin reassignments</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8M-Plus-SOM-pin-reassignments/m-p/1606544#M202094</link>
      <description>&lt;P&gt;firstly you need check if current bsp uses SAI1 for gpio already, for example, you can find&lt;/P&gt;
&lt;P&gt;"&lt;A href="https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-evk.dts?h=lf-5.15.y" target="_blank"&gt;https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-evk.dts?h=lf-5.15.y&lt;/A&gt;"&lt;/P&gt;
&lt;P&gt;MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x19,&amp;nbsp; you can set other SAI1 pins according to reference manual, for example, for&amp;nbsp; MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02, you can check the 8.2.4.232 SW_PAD_CTL_PAD_SAI1_RXD0 SW PAD Control Register (IOMUXC_SW_PAD_CTL_PAD_SAI1_RXD0) of reference manual&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;LI-WRAPPER&gt;&amp;nbsp;&lt;/LI-WRAPPER&gt;&lt;/P&gt;
&lt;P&gt;&lt;CODE&gt;&lt;/CODE&gt;&lt;/P&gt;
&lt;P&gt;&lt;LI-WRAPPER&gt;&lt;/LI-WRAPPER&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 28 Feb 2023 04:03:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8M-Plus-SOM-pin-reassignments/m-p/1606544#M202094</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2023-02-28T04:03:22Z</dc:date>
    </item>
    <item>
      <title>Re: imx8M_Plus_SOM pin reassignments</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8M-Plus-SOM-pin-reassignments/m-p/1606948#M202137</link>
      <description>&lt;P&gt;Thanks for the reply.&amp;nbsp; I'm going to have to start from scratch.&amp;nbsp; What is a BSP?&amp;nbsp; I looked at the file in your link.&amp;nbsp; I'm guessing that it's device tree file.&amp;nbsp; I've never seen one before, so I don't know what any of it means.&amp;nbsp; I looked at the i.MX 8M Plus Applications Processor&lt;BR /&gt;Reference Manual (8.2.4.232).&amp;nbsp; I don't see anything in the register that refers to GPIO.&lt;/P&gt;</description>
      <pubDate>Tue, 28 Feb 2023 15:29:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8M-Plus-SOM-pin-reassignments/m-p/1606948#M202137</guid>
      <dc:creator>omordha</dc:creator>
      <dc:date>2023-02-28T15:29:44Z</dc:date>
    </item>
    <item>
      <title>Re: imx8M_Plus_SOM pin reassignments</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8M-Plus-SOM-pin-reassignments/m-p/1607325#M202163</link>
      <description>&lt;P&gt;bsp is board support packages, did you use I.MX before? you also can find bsp documents from&lt;/P&gt;
&lt;P&gt;"&lt;A href="https://source.codeaurora.org/external/imx/linux-imx/tree/Documentation?h=imx_5.4.70_2.3.0&amp;quot;" target="_blank"&gt;https://source.codeaurora.org/external/imx/linux-imx/tree/Documentation?h=imx_5.4.70_2.3.0"&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;the documents and images for linux, pls find&lt;/P&gt;
&lt;P&gt;"&lt;A href="https://www.nxp.com/design/software/embedded-software/i-mx-software/embedded-linux-for-i-mx-applications-processors:IMXLINUX&amp;quot;" target="_blank"&gt;https://www.nxp.com/design/software/embedded-software/i-mx-software/embedded-linux-for-i-mx-applications-processors:IMXLINUX"&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;for example, if you use SAI1_RXD0 as GPIO, you can refer to the 8.2.4.232 to set it&lt;/P&gt;
&lt;P&gt;"&lt;A href="https://source.codeaurora.org/external/imx/linux-imx/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.txt?h=imx_4.19.35_1.1.0&amp;quot;" target="_blank"&gt;https://source.codeaurora.org/external/imx/linux-imx/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.txt?h=imx_4.19.35_1.1.0"&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;if you first use imx processors, pls refer to these documents and source code firstly&lt;/P&gt;</description>
      <pubDate>Wed, 01 Mar 2023 04:45:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8M-Plus-SOM-pin-reassignments/m-p/1607325#M202163</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2023-03-01T04:45:56Z</dc:date>
    </item>
  </channel>
</rss>

