topic Re: IMX8M TESTER_LOCK protection of bank 0 word 0 in i.MX Processors

IMX8M TESTER_LOCK protection of bank 0 word 0

Romain-PC — Wed, 15 Feb 2023 09:35:17 GMT

Hi,

I am working on an iMX 8M on a Boundary Nitrogen 8M board.

I was studying eFuses and tried to override (shadow burn) the first word of bank 0 used as lock configuration. It doesn't work, without any error.

My TESTER_LOCK fuses are both set to 1. Meaning all Tester words are locked OP and WP. Documentation says that this fuse locks 0x400 to 0x460 words. 0x400 is not Tester word but Lock configuration word. I first thought of a mistake in the documentation, but can you confirm that TESTER_LOCK also locks lock configuration ?

Documentation says TESTER_LOCK is burned by NXP. If so, why lock the Lock configuration? Is it because the board is intended for prototyping?

Best regards,

RomainPC

Re: IMX8M TESTER_LOCK protection of bank 0 word 0

Harvey021 — Fri, 17 Feb 2023 06:49:13 GMT

Hi @Romain-PC

Yes, TESTER_LOCK locks lock configuration. As you see, 0x400 to 0x460, which you can check the Fusemap Descriptions of RM for details.

Best regards

Harvey

Re: IMX8M TESTER_LOCK protection of bank 0 word 0

Romain-PC — Fri, 17 Feb 2023 08:38:01 GMT

Hi @Harvey021 ,

Thank you for your answer,

Is it possible that NXP burned TESTER_LOCK to 1? The board manufacturers? Or can I think that the previous user did the manipulation?

Best regards,

Romain.

Re: IMX8M TESTER_LOCK protection of bank 0 word 0

Harvey021 — Fri, 17 Feb 2023 09:02:59 GMT

TESTER_LOCK should be burned by NXP. Regarding the value, it would be better to read its value for the current chip, as I'm not quite sure each board has the same initial settings.

Best regards

Harvey

Re: IMX8M TESTER_LOCK protection of bank 0 word 0

Romain-PC — Fri, 17 Feb 2023 09:12:04 GMT

Hi

My fuse_LOCK word is 0b0b0103 meaning TESTER_LOCK was shipped at 11 (OP and WP). What is the interest ? So i can't edit this word.

Best regards,

Romain.