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    <title>i.MX ProcessorsのトピックRe: [IMX8QXP][rpmsg] Inter processor communication</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX8QXP-rpmsg-Inter-processor-communication/m-p/1597263#M201371</link>
    <description>&lt;P&gt;&lt;SPAN&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/209642"&gt;@Ferromagnetic&lt;/a&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;DIV&gt;I hope you are doing well.&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;Rpmsg on the linux side (A35) only supports A35 (linux running) core as master.&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;One can use Linux as a&amp;nbsp;bridge&amp;nbsp;to communicate between DSP and M4 core.&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;One can refer to below resources :&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;1. Chapter 7 - Memory Assignment in&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;A href="https://www.nxp.com/docs/en/user-guide/IMX_PORTING_GUIDE.pdf" target="_blank" rel="noopener" data-saferedirecturl="https://www.google.com/url?q=https://www.nxp.com/docs/en/user-guide/IMX_PORTING_GUIDE.pdf&amp;amp;source=gmail&amp;amp;ust=1676109216463000&amp;amp;usg=AOvVaw0jJ8hls76FP0vYr7qdieXI"&gt;i.MX Porting Guide&lt;/A&gt;&amp;nbsp;to reserve memory for DSP and RPMSG.&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;2.&amp;nbsp;&amp;nbsp;&lt;A href="https://www.nxp.com/docs/en/user-guide/IMX_DSP_USERS_GUIDE.pdf" target="_blank" rel="noopener" data-saferedirecturl="https://www.google.com/url?q=https://www.nxp.com/docs/en/user-guide/IMX_DSP_USERS_GUIDE.pdf&amp;amp;source=gmail&amp;amp;ust=1676109216463000&amp;amp;usg=AOvVaw0NCmk1DuTHnWJOKm1LmM48"&gt;i.MX DSP User's Guide&lt;/A&gt;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;Thanks &amp;amp; Regards,&lt;/DIV&gt;
&lt;DIV&gt;Sanket Parekh&lt;/DIV&gt;</description>
    <pubDate>Fri, 10 Feb 2023 10:33:03 GMT</pubDate>
    <dc:creator>Sanket_Parekh</dc:creator>
    <dc:date>2023-02-10T10:33:03Z</dc:date>
    <item>
      <title>[IMX8QXP][rpmsg] Inter processor communication</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8QXP-rpmsg-Inter-processor-communication/m-p/1594720#M201149</link>
      <description>&lt;P&gt;Hi everyone,&lt;/P&gt;&lt;P&gt;I want to launch communication between M4 and HIFI4 core, and I wondering how to do it. RPMSG framework on HIFI4 act like a remote, also on cortex M4 in examples is rpmsg remote. So one way is to use Linux (master) as a bridge to communicate between this cores. Another way is direct comunication, but then M4 have to be a master I think. Also need to set share resources between this cores.&amp;nbsp;Am I right?&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 07 Feb 2023 12:01:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8QXP-rpmsg-Inter-processor-communication/m-p/1594720#M201149</guid>
      <dc:creator>Ferromagnetic</dc:creator>
      <dc:date>2023-02-07T12:01:47Z</dc:date>
    </item>
    <item>
      <title>Re: [IMX8QXP][rpmsg] Inter processor communication</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8QXP-rpmsg-Inter-processor-communication/m-p/1597263#M201371</link>
      <description>&lt;P&gt;&lt;SPAN&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/209642"&gt;@Ferromagnetic&lt;/a&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;DIV&gt;I hope you are doing well.&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;Rpmsg on the linux side (A35) only supports A35 (linux running) core as master.&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;One can use Linux as a&amp;nbsp;bridge&amp;nbsp;to communicate between DSP and M4 core.&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;One can refer to below resources :&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;1. Chapter 7 - Memory Assignment in&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;A href="https://www.nxp.com/docs/en/user-guide/IMX_PORTING_GUIDE.pdf" target="_blank" rel="noopener" data-saferedirecturl="https://www.google.com/url?q=https://www.nxp.com/docs/en/user-guide/IMX_PORTING_GUIDE.pdf&amp;amp;source=gmail&amp;amp;ust=1676109216463000&amp;amp;usg=AOvVaw0jJ8hls76FP0vYr7qdieXI"&gt;i.MX Porting Guide&lt;/A&gt;&amp;nbsp;to reserve memory for DSP and RPMSG.&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;2.&amp;nbsp;&amp;nbsp;&lt;A href="https://www.nxp.com/docs/en/user-guide/IMX_DSP_USERS_GUIDE.pdf" target="_blank" rel="noopener" data-saferedirecturl="https://www.google.com/url?q=https://www.nxp.com/docs/en/user-guide/IMX_DSP_USERS_GUIDE.pdf&amp;amp;source=gmail&amp;amp;ust=1676109216463000&amp;amp;usg=AOvVaw0NCmk1DuTHnWJOKm1LmM48"&gt;i.MX DSP User's Guide&lt;/A&gt;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;Thanks &amp;amp; Regards,&lt;/DIV&gt;
&lt;DIV&gt;Sanket Parekh&lt;/DIV&gt;</description>
      <pubDate>Fri, 10 Feb 2023 10:33:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8QXP-rpmsg-Inter-processor-communication/m-p/1597263#M201371</guid>
      <dc:creator>Sanket_Parekh</dc:creator>
      <dc:date>2023-02-10T10:33:03Z</dc:date>
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