topic Re: i.MAX8M Plus PCIE in i.MX Processors

i.MAX8M Plus PCIE

showu — Mon, 30 Jan 2023 05:48:51 GMT

Boundary Nitrogen8M Plus SOM and NIT8MP_EVK_CAR_BRD REV30-P1 carrier board are used together.

I am using the Nitrogen8MP Yocto Zeus release. The kernel version you are using is boundary-imx_5.4.x_2.2.0.

A problem has occurred with the PCI interface (mPCIE connector). The wifi module under test is the MikroTik R11e-5HacT.

Not sure how to continue troubleshooting this. Do you have any solutions/recommendations? Also let me know if there are any other outputs or diagnostics that would be helpful.

Thanks heaps in advance.

Diagnostic Messages:

# dmesg | grep pci

[ 1.788449] imx6q-pcie 33800000.pcie: 33800000.pcie supply epdev_on not found, using dummy regulator
[ 1.797766] imx6_pcie_probe: reset gp 125
[ 1.801847] imx6q-pcie 33800000.pcie: pcie_ext_src clk src missing or invalid
[ 1.815033] imx6q-pcie 33800000.pcie: Failed to get PCIEPHY perst control
[ 2.092316] ehci-pci: EHCI PCI platform driver
[ 2.113854] ohci-pci: OHCI PCI platform driver
[ 3.439333] imx6q-pcie 33800000.pcie: 33800000.pcie supply epdev_on not found, using dummy regulator
[ 3.448569] imx6_pcie_probe: reset gp 125
[ 3.459169] imx6q-pcie 33800000.pcie: pcie_ext_src clk src missing or invalid
[ 3.473328] imx6q-pcie 33800000.pcie: PLL REF_CLK is used!.
[ 3.489640] imx6q-pcie 33800000.pcie: PCIe PHY PLL clock is locked.
[ 3.505386] imx6q-pcie 33800000.pcie: PCIe PLL locked after 0 us.
[ 3.552199] imx6q-pcie 33800000.pcie: host bridge /pcie@33800000 ranges:
[ 3.558911] imx6q-pcie 33800000.pcie: No bus range found for /pcie@33800000, using [bus 00-ff]
[ 3.574830] imx6q-pcie 33800000.pcie: Parsing ranges property...
[ 3.581444] imx6q-pcie 33800000.pcie: IO 0x1ff80000..0x1ff8ffff -> 0x00000000
[ 3.588852] imx6q-pcie 33800000.pcie: MEM 0x18000000..0x1fefffff -> 0x18000000
[ 4.601953] imx6q-pcie 33800000.pcie: Phy link never came up
[ 4.607658] imx6q-pcie 33800000.pcie: failed to initialize host
[ 4.613600] imx6q-pcie 33800000.pcie: unable to add pcie port.

Re: i.MAX8M Plus PCIE

Sanket_Parekh — Fri, 03 Feb 2023 11:50:07 GMT

Hi @showu

I hope you are doing well

Kindly share the lspci -v output?

Kindly mention which device tree you are using?

Please mention ext_osc=<1> property in the device tree and try. In most cases it solves the issue.

One can refer to IMX8MPHDG Table 8. PCIe recommendations for more information.

Thanks & Regards

Sanket Parekh

Re: i.MAX8M Plus PCIE

showu — Mon, 06 Feb 2023 00:49:30 GMT

hi. @Sanket_Parekh

Thanks for answering first

lspci -v gives no output. It is caused by pcie phy link up failure.

I am using imx8mp-nitrogen8mp.dts device tree from freescale folder.

I tested it by changing the ext_osc=<1> property in the device tree, but it failed the same and outputted additional logs.
[ 3.365488] imx6q-pcie 33800000.pcie: PCIe PHY PLL clock is locked.
+[ 3.401936] pcie phy pipe clk is not ready
+[ 3.407009] phy phy-32f00000.pcie-phy4: phy init failed --> -110
+[ 3.407012] imx6q-pcie 33800000.pcie: Waiting for PHY PLL ready timeout!
+[ 3.439479] imx6q-pcie 33800000.pcie: PCIe PLL lock timeout
[ 3.485569] imx6q-pcie 33800000.pcie: host bridge /pcie@33800000 ranges:

Thanks heaps in advance.

Re: i.MAX8M Plus PCIE

Sanket_Parekh — Fri, 10 Feb 2023 09:19:53 GMT

Hi @showu

I hope you are doing well.

One can narrow down the issue by the suggestions below.

Kindly confirm that you are getting sufficient voltage at the PCI connector required by the end device.
Please try to attach other PCI cards and check if Link is getting up or not. because we suspect that the "Phy link never came up" error can be from the hardware side.

It may help to solve the issue.

If the issue persists, kindly share the whole debug log file and the defconfig file for further debugging the issue.

Thanks & Regards

Sanket Parekh