<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic generating TFLITE models for iMX8+ in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/generating-TFLITE-models-for-iMX8/m-p/1587162#M200573</link>
    <description>&lt;P&gt;I am trying to run TFLITE models on a board that contains iMX8+ core (third party board, variscite).&lt;BR /&gt;basically I prepare an 8-bit quantized TFLITE model using tensorflow.lite.converter.&lt;/P&gt;&lt;P&gt;the model has at least some validity as I can compile it successfully for a different EDGE device.&lt;/P&gt;&lt;P&gt;however I fail to run it on the iMX8+ (at least not on variscite board).&lt;BR /&gt;&lt;BR /&gt;I have a general question: before asking any specific question, is there any NXP guiding material on how to prepare TFLITE models for iMX8+ (restrictions, unsupported ops, versions and/or flags for the converter, etc.)?&lt;BR /&gt;or any post-processing is required for the file that tensorflow.lite.convert() generates?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;thanks&lt;/P&gt;</description>
    <pubDate>Tue, 24 Jan 2023 14:27:01 GMT</pubDate>
    <dc:creator>menashesoffer</dc:creator>
    <dc:date>2023-01-24T14:27:01Z</dc:date>
    <item>
      <title>generating TFLITE models for iMX8+</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/generating-TFLITE-models-for-iMX8/m-p/1587162#M200573</link>
      <description>&lt;P&gt;I am trying to run TFLITE models on a board that contains iMX8+ core (third party board, variscite).&lt;BR /&gt;basically I prepare an 8-bit quantized TFLITE model using tensorflow.lite.converter.&lt;/P&gt;&lt;P&gt;the model has at least some validity as I can compile it successfully for a different EDGE device.&lt;/P&gt;&lt;P&gt;however I fail to run it on the iMX8+ (at least not on variscite board).&lt;BR /&gt;&lt;BR /&gt;I have a general question: before asking any specific question, is there any NXP guiding material on how to prepare TFLITE models for iMX8+ (restrictions, unsupported ops, versions and/or flags for the converter, etc.)?&lt;BR /&gt;or any post-processing is required for the file that tensorflow.lite.convert() generates?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;thanks&lt;/P&gt;</description>
      <pubDate>Tue, 24 Jan 2023 14:27:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/generating-TFLITE-models-for-iMX8/m-p/1587162#M200573</guid>
      <dc:creator>menashesoffer</dc:creator>
      <dc:date>2023-01-24T14:27:01Z</dc:date>
    </item>
    <item>
      <title>Re: generating TFLITE models for iMX8+</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/generating-TFLITE-models-for-iMX8/m-p/1587674#M200619</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;You can check the eIQ blog from:&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt;&lt;A href="https://community.nxp.com/t5/Blogs/eIQ-Sample-Apps-TFLite-Quantization/ba-p/1131121" target="_blank"&gt;https://community.nxp.com/t5/Blogs/eIQ-Sample-Apps-TFLite-Quantization/ba-p/1131121&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;</description>
      <pubDate>Wed, 25 Jan 2023 14:22:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/generating-TFLITE-models-for-iMX8/m-p/1587674#M200619</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2023-01-25T14:22:47Z</dc:date>
    </item>
  </channel>
</rss>

