topic Re: I.MX1020RT ENET in i.MX Processors

I.MX1020RT ENET

jfsimon1981 — Thu, 19 Jan 2023 15:22:25 GMT

Good evening,

I program ENET on an I.MX 1020RT using MCUExpresso at baremetal, and after configuring the PHY, ENET module, descriptors and buffers, i experience an issue:

Upon transmission (writing data+length into tx buffer) and the data isn't sent over.

Could you please provide a few clarifications on the process.

In init, ECR and TCR are set, ENET is enabled, PHY is working (link up).

It seems almost everything is fine except (perhaps ?) a switch which enables the uDMA action ...

Any help or highlight is helpful.

Thanks,

Jean-François

Re: I.MX1020RT ENET

nxf77486 — Wed, 18 Jan 2023 17:45:42 GMT

Hello @jfsimon1981 ,

Thank you in advance for contacting NXP support.

Can you please help me confirming some information and answering the following questions?

I understand that the problem of the configuration is only the DMA as the ECR, TCR and ENET are working properly?

If my understanding is correct, please help me with the following question:

How did you configurate the DMA (using Config tools)? If the Config tools has not been used can we try this functionality?

Please let me know this information in order to find a solution to this problem.

Re: I.MX1020RT ENET

jfsimon1981 — Wed, 18 Jan 2023 18:27:25 GMT

Dear Support,

I didn't configure the DMA, yes the rest seems to work. Although DMA don't empty queue (Receipt/Transmit) not do i see the ENET interrupt related to any buffer/descriptor activity.

I tried to understand if DMA needs be configured and got the possibly erroneous understanding the uDMA, part of ENET module, just works as long as the peripheral clock is enable.

I also (possibly erroneously) understood that eDMA, which is unrelated to uDMA and ENET, requires configuration, but itsn't used in present situation, where i just need to poll buffers for RX/TX using ENET->TDAR to start the uDMA.

Please correct me as needed thanks.

Yes i figured out the DMA doesn't look active, and thus got into further reading about uDMA, but the man pages only call for it as a submodule of ENET, and no configuration about uDMA can be found in the ENET register set ...

Stuck and happy see some help, thanks.

Jean-François

Re: I.MX1020RT ENET

jfsimon1981 — Thu, 19 Jan 2023 13:03:37 GMT

Hello,
I responded to your post at the topic level just above.
In short, yes please propose steps.

Thank you
Jean-François

Re: I.MX1020RT ENET

nxf77486 — Thu, 19 Jan 2023 20:35:47 GMT

Hello,

Sure, for this you can find information related to this configuration in the following chapters:

Chapter 37.5.12 Interrupt Event Register, where you can find the EBERR (for ethernet bus error), and ETHEREN the uDMA, buffer descriptor, and FIFO control logic are reset, including

the buffer descriptor and FIFO pointers.

37.3.14.1 this chapter shows the table of enhanced uDMA.

Also the DMA can be configurated with our Config tools available in the MCUXpresso.

Re: I.MX1020RT ENET

jfsimon1981 — Fri, 20 Jan 2023 01:16:56 GMT

Hi,

Ok thanks, though this is already done in code, ECR:ETHEREN is enabled. I send RDAR and TDAR commands to init buffers.

Is this all that's needed (plus the peripheral clock at ENET) to have uDMA running then ?

If i read you correctly, i didn't miss it.
Any insight why uDMA would not process the buffers ?

Thanks & regards,

Jean-François

Re: I.MX1020RT ENET

nxf77486 — Fri, 20 Jan 2023 22:05:42 GMT

Hello,

We have some examples of the DMA available for the SDK of the RT1020, this can be used as a guide to configure the DMA.

I would leave the link to the download of the SDK below, please let me know if there is anything else where I can help you.

EVK-MIMXRT1020

Re: I.MX1020RT ENET

jfsimon1981 — Sat, 28 Jan 2023 04:47:22 GMT

Good day,
I was informed that some memory region can't be r/w by DMA. The issue was fixed placing the buffers into ITC or OTC region.
DMA won't process in region 0x80000000 (main board sdram).

I can't find much informations about this in man ...

Can you please provide more details on this.

Regards,
Jean-François

Re: I.MX1020RT ENET

nxf77486 — Mon, 30 Jan 2023 21:31:21 GMT

Hello,

Regarding DMA memory map it is located on the reference manual section 6.5.5. Also if you require more details please let me know.