i.MX ProcessorsのトピックRe: i.MX RT1020 MII Speed Control Register (MSCR)

i.MX RT1020 MII Speed Control Register (MSCR)

jfsimon1981 — Fri, 30 Dec 2022 18:17:18 GMT

Good morning,

In man §37.5.1.8 ENET "Internal module clock frequency" (MDC pin, clock for MII/RMII interface), which clock does the table refer to (Internal module clock frequency) please ?

Regards

Jean-François

Re: i.MX RT1020 MII Speed Control Register (MSCR)

Omar_Anguiano — Wed, 04 Jan 2023 18:13:36 GMT

Hello
Hope you are well.
It refers to the MAC clock referred on table 37-46:

Omar_Anguiano_1-1672855949415.png

Best regards,
Omar

Re: i.MX RT1020 MII Speed Control Register (MSCR)

jfsimon1981 — Sat, 07 Jan 2023 12:12:31 GMT

Hi, Thanks, not really, in the #define i see 3 sources, i couldn't get a clear reading which those drive in the chip:

From clock setup in MCU expresso:
BOARD_BOOTCLOCKRUN_ENET_125M_CLK
BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK
BOARD_BOOTCLOCKRUN_ENET_500M_REF_CLK

The clock you refer to seems derived from BOARD_BOOTCLOCKRUN_ENET_125M_CLK but i couldn't see this in the man, except i missed something ?

Regards

Jean-François

Re: i.MX RT1020 MII Speed Control Register (MSCR)

Omar_Anguiano — Fri, 13 Jan 2023 23:16:27 GMT

To be more specific it refers to the reference clock. Regarding those macros, the frequency will depend on your phy. If your PHY uses 50MHz ref clock then the 125M clock will be the MAC.
If Reference clock is input then the frequency is the MAC clock:

Omar_Anguiano_0-1673651749256.png

Best regards,
Omar