<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX ProcessorsのトピックRe: imx6ull</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/imx6ull/m-p/1560487#M198079</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/66194"&gt;@chenchenchen&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;Thanks for the update.&lt;/P&gt;
&lt;P&gt;Since the issue is resolved, I am closing this case.&lt;/P&gt;
&lt;P&gt;Please raise a new ticket, if you have any new questions.&lt;/P&gt;
&lt;P&gt;Thanks &amp;amp; Regards,&lt;BR /&gt;Ritesh M Patel&lt;/P&gt;</description>
    <pubDate>Mon, 28 Nov 2022 09:14:49 GMT</pubDate>
    <dc:creator>riteshmpatel</dc:creator>
    <dc:date>2022-11-28T09:14:49Z</dc:date>
    <item>
      <title>imx6ull</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6ull/m-p/1558151#M197869</link>
      <description>&lt;P&gt;Hello:&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; I try to use JTAG_TDI pad as a gpio, but I find that I can't control it's output&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; and JTAG_TMS pin as a gpio works well.why?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="chenchenchen_0-1669175868989.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/201327iE452F38A1F7EC6DA/image-size/medium?v=v2&amp;amp;px=400" role="button" title="chenchenchen_0-1669175868989.png" alt="chenchenchen_0-1669175868989.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 23 Nov 2022 04:00:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6ull/m-p/1558151#M197869</guid>
      <dc:creator>chenchenchen</dc:creator>
      <dc:date>2022-11-23T04:00:07Z</dc:date>
    </item>
    <item>
      <title>Re: imx6ull</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6ull/m-p/1558427#M197895</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/66194"&gt;@chenchenchen&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;I hope you are doing well.&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;
&lt;P&gt;In the attached image of Pad IO and control configurations, the 0x03b1 value will be written to the IOMUXC_SW_PAD_CTL_PAD_JTAG_TDI register.&lt;BR /&gt;&lt;STRONG&gt;MX6UL_PAD_JTAG_TDI__GPIO1_IO13&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;0x03b1&lt;/STRONG&gt;&lt;BR /&gt;&lt;BR /&gt;0x03b1 value will write to the [9:8] bitfield, which is reserved. One should use the default value 0x1b0b0.&lt;/P&gt;
&lt;P&gt;Please apply the below change to dts:&lt;/P&gt;
&lt;P&gt;- MX6UL_PAD_JTAG_TDI__GPIO1_IO13 0x03b1&lt;BR /&gt;&lt;STRONG&gt;+ MX6UL_PAD_JTAG_TDI__GPIO1_IO13 0x1b0b0&lt;/STRONG&gt;&lt;BR /&gt;&lt;BR /&gt;OR&lt;/P&gt;
&lt;P&gt;Alternatively, one can configure this value according to one's requirements by referring to &lt;STRONG&gt;Section 32.6.150&lt;/STRONG&gt; &lt;STRONG&gt;SW_PAD_CTL_PAD_JTAG_TDI SW PAD Control&lt;/STRONG&gt; in &lt;STRONG&gt;i.MX 6ULL Applications Processor Reference Manual.&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;Thanks &amp;amp; Regards,&lt;BR /&gt;Ritesh M Patel&lt;/P&gt;</description>
      <pubDate>Wed, 23 Nov 2022 10:20:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6ull/m-p/1558427#M197895</guid>
      <dc:creator>riteshmpatel</dc:creator>
      <dc:date>2022-11-23T10:20:14Z</dc:date>
    </item>
    <item>
      <title>Re: imx6ull</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6ull/m-p/1560470#M198076</link>
      <description>&lt;P&gt;Hello：&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; Thanks for your response.&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;It is solved.&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;I make a mistake to write GPIO5_IOx at devicetree of iomuxc, GPIO_IOx conf reg offset is equal to&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; JTAG_XX mux&amp;nbsp;mode reg offset. it is conflict.&lt;/P&gt;</description>
      <pubDate>Mon, 28 Nov 2022 09:03:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6ull/m-p/1560470#M198076</guid>
      <dc:creator>chenchenchen</dc:creator>
      <dc:date>2022-11-28T09:03:22Z</dc:date>
    </item>
    <item>
      <title>Re: imx6ull</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6ull/m-p/1560487#M198079</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/66194"&gt;@chenchenchen&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;Thanks for the update.&lt;/P&gt;
&lt;P&gt;Since the issue is resolved, I am closing this case.&lt;/P&gt;
&lt;P&gt;Please raise a new ticket, if you have any new questions.&lt;/P&gt;
&lt;P&gt;Thanks &amp;amp; Regards,&lt;BR /&gt;Ritesh M Patel&lt;/P&gt;</description>
      <pubDate>Mon, 28 Nov 2022 09:14:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6ull/m-p/1560487#M198079</guid>
      <dc:creator>riteshmpatel</dc:creator>
      <dc:date>2022-11-28T09:14:49Z</dc:date>
    </item>
  </channel>
</rss>

