<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: does I3C need pull-up resistances? in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/does-I3C-need-pull-up-resistances/m-p/1549383#M197252</link>
    <description>&lt;P&gt;Hi @guiweisun&lt;/P&gt;&lt;P&gt;thanks for you reply&lt;/P&gt;&lt;P&gt;but when controller assigns the dynamic address, SDA is in open drain mode. If the bus doesn't have pull-up resistances, Will the dynamic address assignment process succeed？&lt;/P&gt;&lt;P&gt;Q2：&lt;/P&gt;&lt;P&gt;what mode does contoller send the dynamic address? open-drain?push-pull?&lt;/P&gt;&lt;P&gt;Q3:&lt;/P&gt;&lt;P&gt;What is the time range for effective response from the slave?&lt;/P&gt;&lt;P&gt;the below picture shows the dynamic address is 0x09,&lt;/P&gt;&lt;P&gt;the ACK bit lasts a long time, is it right?&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="melanie_1-1667801021353.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/199343iD8F42D0A7D950511/image-size/medium?v=v2&amp;amp;px=400" role="button" title="melanie_1-1667801021353.png" alt="melanie_1-1667801021353.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;/* Attach main clock to I3C, 396MHz / 4 = 99MHz. */&lt;BR /&gt;CLOCK_AttachClk(kMAIN_CLK_to_I3C_CLK);&lt;BR /&gt;CLOCK_SetClkDiv(kCLOCK_DivI3cClk, 4);&lt;/P&gt;&lt;P&gt;PRINTF("\r\nI3C bus master example.\r\n");&lt;BR /&gt;/* setup I3C pins */&lt;BR /&gt;i3c_demo_pin_setup();&lt;/P&gt;&lt;P&gt;CLOCK_AttachClk(kMAIN_CLK_to_I3C_CLK);&lt;BR /&gt;CLOCK_SetClkDiv(kCLOCK_DivI3cClk, 20);&lt;/P&gt;&lt;P&gt;/* enable clock, reset module */&lt;BR /&gt;CLOCK_EnableClock(kCLOCK_I3c0);&lt;BR /&gt;RESET_PeripheralReset(kI3C0_RST_SHIFT_RSTn);&lt;/P&gt;&lt;P&gt;/* adjust I3C default configuration parameter selection */&lt;BR /&gt;I3C_MasterGetDefaultConfig(&amp;amp;masterConfig);&lt;BR /&gt;masterConfig.disableTimeout = true;&lt;BR /&gt;masterConfig.hKeep = kI3C_MasterHighKeeperNone;&lt;BR /&gt;masterConfig.baudRate_Hz.i2cBaud = 400000U;&lt;BR /&gt;masterConfig.baudRate_Hz.i3cOpenDrainBaud = 1000000U;&lt;BR /&gt;masterConfig.baudRate_Hz.i3cPushPullBaud = 6000000U;&lt;BR /&gt;masterConfig.enableOpenDrainStop = false;&lt;BR /&gt;I3C_MasterInit(EXAMPLE_MASTER, &amp;amp;masterConfig, I3C_MASTER_CLOCK_FREQUENCY);&lt;/P&gt;&lt;P&gt;// I3C FCLK = 12.5 MHz (80 ns) derived from Main Clock = 500 MHz&lt;BR /&gt;CLOCK_SetClkDiv(kCLOCK_DivI3cClk, 40);&lt;/P&gt;&lt;P&gt;I3C-&amp;gt;MCONFIG =&lt;BR /&gt;I3C_MCONFIG_MSTENA(1) | // enable master&lt;BR /&gt;I3C_MCONFIG_DISTO(1) | // disable time out&lt;BR /&gt;I3C_MCONFIG_HKEEP(0) | // High-Keeper: NONE - Use PUR (Pull-Up Resistor). Hold SCL High.&lt;BR /&gt;I3C_MCONFIG_ODSTOP(0) | // do not emit STOP at open-drain speeds for I3C messages&lt;BR /&gt;I3C_MCONFIG_ODHPP(0); // Open-Drain High = 0 open-drain count for I3C messages&lt;/P&gt;&lt;P&gt;// open drain bit rate: ODBAUD + ODBAUD = 3.20 us &amp;lt;=&amp;gt; 312 kHz&lt;BR /&gt;// push-pull bit rate: TLPP + THPP = 2.56 us &amp;lt;=&amp;gt; 390 kHz&lt;BR /&gt;I3C-&amp;gt;MCONFIG =&lt;BR /&gt;(I3C-&amp;gt;MCONFIG &amp;amp; ~(I3C_MCONFIG_SKEW_MASK | I3C_MCONFIG_PPBAUD_MASK | I3C_MCONFIG_PPLOW_MASK | I3C_MCONFIG_ODBAUD_MASK | I3C_MCONFIG_I2CBAUD_MASK)) |&lt;BR /&gt;I3C_MCONFIG_SKEW(0) | // SKEW = 0&lt;BR /&gt;I3C_MCONFIG_PPBAUD(9) | // THPP = TFCLK*(1+9) = 80ns * (1+9) = 0.80us&lt;BR /&gt;I3C_MCONFIG_PPLOW(12) | // TLPP = THPP(1+9+12) = 80ns * (1+9+12) = 1.76us&lt;BR /&gt;I3C_MCONFIG_ODBAUD(1) | // ODBAUD = THPP*(1+1) = 0.8us * (1+1) = 1.6us&lt;BR /&gt;I3C_MCONFIG_I2CBAUD(0); // (0+0)&lt;/P&gt;&lt;P&gt;0x09 is dynamic address.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Mon, 07 Nov 2022 06:08:50 GMT</pubDate>
    <dc:creator>melanie</dc:creator>
    <dc:date>2022-11-07T06:08:50Z</dc:date>
    <item>
      <title>does I3C need pull-up resistances?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/does-I3C-need-pull-up-resistances/m-p/1549314#M197241</link>
      <description>&lt;P&gt;Hi team&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;does I3C need pull-up resistances?what the value of the pull-up resistances?thanks&lt;/P&gt;</description>
      <pubDate>Mon, 07 Nov 2022 02:57:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/does-I3C-need-pull-up-resistances/m-p/1549314#M197241</guid>
      <dc:creator>melanie</dc:creator>
      <dc:date>2022-11-07T02:57:52Z</dc:date>
    </item>
    <item>
      <title>Re: does I3C need pull-up resistances?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/does-I3C-need-pull-up-resistances/m-p/1549331#M197244</link>
      <description>&lt;P&gt;For the I3C SCL is push pull, SDA Open Drain and push pull,nomrally no need pull up resistances.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 07 Nov 2022 03:13:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/does-I3C-need-pull-up-resistances/m-p/1549331#M197244</guid>
      <dc:creator>guoweisun</dc:creator>
      <dc:date>2022-11-07T03:13:09Z</dc:date>
    </item>
    <item>
      <title>Re: does I3C need pull-up resistances?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/does-I3C-need-pull-up-resistances/m-p/1549383#M197252</link>
      <description>&lt;P&gt;Hi @guiweisun&lt;/P&gt;&lt;P&gt;thanks for you reply&lt;/P&gt;&lt;P&gt;but when controller assigns the dynamic address, SDA is in open drain mode. If the bus doesn't have pull-up resistances, Will the dynamic address assignment process succeed？&lt;/P&gt;&lt;P&gt;Q2：&lt;/P&gt;&lt;P&gt;what mode does contoller send the dynamic address? open-drain?push-pull?&lt;/P&gt;&lt;P&gt;Q3:&lt;/P&gt;&lt;P&gt;What is the time range for effective response from the slave?&lt;/P&gt;&lt;P&gt;the below picture shows the dynamic address is 0x09,&lt;/P&gt;&lt;P&gt;the ACK bit lasts a long time, is it right?&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="melanie_1-1667801021353.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/199343iD8F42D0A7D950511/image-size/medium?v=v2&amp;amp;px=400" role="button" title="melanie_1-1667801021353.png" alt="melanie_1-1667801021353.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;/* Attach main clock to I3C, 396MHz / 4 = 99MHz. */&lt;BR /&gt;CLOCK_AttachClk(kMAIN_CLK_to_I3C_CLK);&lt;BR /&gt;CLOCK_SetClkDiv(kCLOCK_DivI3cClk, 4);&lt;/P&gt;&lt;P&gt;PRINTF("\r\nI3C bus master example.\r\n");&lt;BR /&gt;/* setup I3C pins */&lt;BR /&gt;i3c_demo_pin_setup();&lt;/P&gt;&lt;P&gt;CLOCK_AttachClk(kMAIN_CLK_to_I3C_CLK);&lt;BR /&gt;CLOCK_SetClkDiv(kCLOCK_DivI3cClk, 20);&lt;/P&gt;&lt;P&gt;/* enable clock, reset module */&lt;BR /&gt;CLOCK_EnableClock(kCLOCK_I3c0);&lt;BR /&gt;RESET_PeripheralReset(kI3C0_RST_SHIFT_RSTn);&lt;/P&gt;&lt;P&gt;/* adjust I3C default configuration parameter selection */&lt;BR /&gt;I3C_MasterGetDefaultConfig(&amp;amp;masterConfig);&lt;BR /&gt;masterConfig.disableTimeout = true;&lt;BR /&gt;masterConfig.hKeep = kI3C_MasterHighKeeperNone;&lt;BR /&gt;masterConfig.baudRate_Hz.i2cBaud = 400000U;&lt;BR /&gt;masterConfig.baudRate_Hz.i3cOpenDrainBaud = 1000000U;&lt;BR /&gt;masterConfig.baudRate_Hz.i3cPushPullBaud = 6000000U;&lt;BR /&gt;masterConfig.enableOpenDrainStop = false;&lt;BR /&gt;I3C_MasterInit(EXAMPLE_MASTER, &amp;amp;masterConfig, I3C_MASTER_CLOCK_FREQUENCY);&lt;/P&gt;&lt;P&gt;// I3C FCLK = 12.5 MHz (80 ns) derived from Main Clock = 500 MHz&lt;BR /&gt;CLOCK_SetClkDiv(kCLOCK_DivI3cClk, 40);&lt;/P&gt;&lt;P&gt;I3C-&amp;gt;MCONFIG =&lt;BR /&gt;I3C_MCONFIG_MSTENA(1) | // enable master&lt;BR /&gt;I3C_MCONFIG_DISTO(1) | // disable time out&lt;BR /&gt;I3C_MCONFIG_HKEEP(0) | // High-Keeper: NONE - Use PUR (Pull-Up Resistor). Hold SCL High.&lt;BR /&gt;I3C_MCONFIG_ODSTOP(0) | // do not emit STOP at open-drain speeds for I3C messages&lt;BR /&gt;I3C_MCONFIG_ODHPP(0); // Open-Drain High = 0 open-drain count for I3C messages&lt;/P&gt;&lt;P&gt;// open drain bit rate: ODBAUD + ODBAUD = 3.20 us &amp;lt;=&amp;gt; 312 kHz&lt;BR /&gt;// push-pull bit rate: TLPP + THPP = 2.56 us &amp;lt;=&amp;gt; 390 kHz&lt;BR /&gt;I3C-&amp;gt;MCONFIG =&lt;BR /&gt;(I3C-&amp;gt;MCONFIG &amp;amp; ~(I3C_MCONFIG_SKEW_MASK | I3C_MCONFIG_PPBAUD_MASK | I3C_MCONFIG_PPLOW_MASK | I3C_MCONFIG_ODBAUD_MASK | I3C_MCONFIG_I2CBAUD_MASK)) |&lt;BR /&gt;I3C_MCONFIG_SKEW(0) | // SKEW = 0&lt;BR /&gt;I3C_MCONFIG_PPBAUD(9) | // THPP = TFCLK*(1+9) = 80ns * (1+9) = 0.80us&lt;BR /&gt;I3C_MCONFIG_PPLOW(12) | // TLPP = THPP(1+9+12) = 80ns * (1+9+12) = 1.76us&lt;BR /&gt;I3C_MCONFIG_ODBAUD(1) | // ODBAUD = THPP*(1+1) = 0.8us * (1+1) = 1.6us&lt;BR /&gt;I3C_MCONFIG_I2CBAUD(0); // (0+0)&lt;/P&gt;&lt;P&gt;0x09 is dynamic address.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 07 Nov 2022 06:08:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/does-I3C-need-pull-up-resistances/m-p/1549383#M197252</guid>
      <dc:creator>melanie</dc:creator>
      <dc:date>2022-11-07T06:08:50Z</dc:date>
    </item>
    <item>
      <title>Re: does I3C need pull-up resistances?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/does-I3C-need-pull-up-resistances/m-p/1550556#M197329</link>
      <description>&lt;P&gt;hi&amp;nbsp;&lt;/P&gt;&lt;P&gt;any updates?&lt;/P&gt;&lt;P&gt;thanks&lt;/P&gt;</description>
      <pubDate>Wed, 09 Nov 2022 00:03:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/does-I3C-need-pull-up-resistances/m-p/1550556#M197329</guid>
      <dc:creator>melanie</dc:creator>
      <dc:date>2022-11-09T00:03:36Z</dc:date>
    </item>
    <item>
      <title>Re: does I3C need pull-up resistances?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/does-I3C-need-pull-up-resistances/m-p/1550563#M197330</link>
      <description>&lt;P&gt;I mean your questions about NXP I3C products P3A9606/P3S0200 not the I.MX.&lt;/P&gt;
&lt;P&gt;If mentioned question about I.MX please submit ticket or create new topic in this community.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://support.nxp.com/s/?language=en_US" target="_blank"&gt;Home (nxp.com)&lt;/A&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 09 Nov 2022 00:40:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/does-I3C-need-pull-up-resistances/m-p/1550563#M197330</guid>
      <dc:creator>guoweisun</dc:creator>
      <dc:date>2022-11-09T00:40:43Z</dc:date>
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  </channel>
</rss>

