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    <title>i.MX ProcessorsのトピックRe: iMXRT 1176 not booting from application code (Error: Wire Ack Fault - target connected?)</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/iMXRT-1176-not-booting-from-application-code-Error-Wire-Ack/m-p/1543777#M196841</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/40101"&gt;@jay_heng&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks a lot for your reply.&lt;/P&gt;&lt;P&gt;The blog is very much informative. Yes, the driver does enable OPI mode during flash image download.&lt;/P&gt;&lt;P&gt;As per the blog, there are 3 ways to reset external flash and also it is necessary to reset flash along with soft reset.&lt;/P&gt;&lt;P&gt;One way to reset is using hardware pin RESET# from flash.&lt;/P&gt;&lt;P&gt;We have developed Octal flash driver on the basis of&amp;nbsp;iMXRT117x_FlexSPI_SFDP project.&lt;/P&gt;&lt;P&gt;The flash driver project from NXP (iMXRT117x_FlexSPI_SFDP) uses GPIO_AD_03 as RESET#, but we need to use&amp;nbsp;GPIO_SD_B2_11 to reset flash.&lt;/P&gt;&lt;P&gt;Below code section is from&amp;nbsp;iMXRT117x_FlexSPI_SFDP, which resets flash using RESET# pin.&lt;/P&gt;&lt;P&gt;// ****************&lt;BR /&gt;// Reset external flash via GPIO&lt;/P&gt;&lt;P&gt;// The problem with the external flash reset is that the actual pin&lt;BR /&gt;// that is being used is board-specific: EVK boards use GPIO_AD_03,&lt;BR /&gt;// but custom boards can use anything!&lt;BR /&gt;// Please update this section accordingly&lt;BR /&gt;// GPIO_AD_03 -&amp;gt; routed to GPIO port 9, pin 2&lt;BR /&gt;#define PIN_MASK (1 &amp;lt;&amp;lt; 2)&lt;/P&gt;&lt;P&gt;// Enable clock to IOMUX (LPCG49)&lt;BR /&gt;uint32_t lpcg = MEM_ReadU32(0x40cc6620);&lt;BR /&gt;if (!(lpcg &amp;amp; 1))&lt;BR /&gt;{&lt;BR /&gt;// CCM-&amp;gt;LPCG49 = EN (IOMUX)&lt;BR /&gt;MEM_WriteU32(0x40cc6620, (lpcg | 1));&lt;BR /&gt;__asm volatile ("dsb 0xF":::"memory");&lt;BR /&gt;__asm volatile ("isb 0xF":::"memory");&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;// Enable clock to GPIO_9 (LPCG51)&lt;BR /&gt;lpcg = MEM_ReadU32(0x40cc6660);&lt;BR /&gt;if (!(lpcg &amp;amp; 1))&lt;BR /&gt;{&lt;BR /&gt;// CCM-&amp;gt;LPCG51 = EN (GPIO_9)&lt;BR /&gt;MEM_WriteU32(0x40cc6660, (lpcg | 1));&lt;BR /&gt;__asm volatile ("dsb 0xF":::"memory");&lt;BR /&gt;__asm volatile ("isb 0xF":::"memory");&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;// Disable interrupt GPIO9-&amp;gt;IMR &amp;amp;= ~(1 &amp;lt;&amp;lt; pin)&lt;BR /&gt;uint32_t imr = MEM_ReadU32(0x40c64014);&lt;BR /&gt;MEM_WriteU32(0x40c64014, imr &amp;amp; ~PIN_MASK);&lt;BR /&gt;// Set DIR (output) GPIO9-&amp;gt;GDIR |= (1 &amp;lt;&amp;lt; pin);&lt;BR /&gt;uint32_t dir = MEM_ReadU32(0x40c64004);&lt;BR /&gt;MEM_WriteU32(0x40c64004, dir | PIN_MASK);&lt;BR /&gt;// Drive high GPIO9-&amp;gt;DR_SET = (1 &amp;lt;&amp;lt; pin);&lt;BR /&gt;MEM_WriteU32(0x40c64084, PIN_MASK);&lt;/P&gt;&lt;P&gt;// Route to GPIO IOMUX-&amp;gt;SW_MUX_CTL_PAD_GPIO_AD_03 = 0xA&lt;BR /&gt;MEM_WriteU32(0x400e8118, 0xa);&lt;/P&gt;&lt;P&gt;MEM_WriteU32(0x400e835cu, 0x12);&lt;/P&gt;&lt;P&gt;// Toggle GPIO9-&amp;gt;DR_TOGGLE = (1 &amp;lt;&amp;lt; pin);&lt;BR /&gt;MEM_WriteU32(0x40c6408c, PIN_MASK);&lt;BR /&gt;// Delay some time to reset external flash&lt;BR /&gt;for (uint32_t i = 0; i &amp;lt; 3000000; i++)&lt;BR /&gt;__asm volatile ("nop");&lt;BR /&gt;// Toggle GPIO9-&amp;gt;DR_TOGGLE = (1 &amp;lt;&amp;lt; pin);&lt;BR /&gt;MEM_WriteU32(0x40c6408c, PIN_MASK);&lt;BR /&gt;for (uint32_t i = 0; i &amp;lt; 3000000; i++)&lt;BR /&gt;__asm volatile ("nop");&lt;BR /&gt;// ****************&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Could you please guide me on how to do above operation from gpio pin&amp;nbsp;GPIO_SD_B2_11?&lt;/P&gt;</description>
    <pubDate>Wed, 26 Oct 2022 05:15:05 GMT</pubDate>
    <dc:creator>HMUser</dc:creator>
    <dc:date>2022-10-26T05:15:05Z</dc:date>
    <item>
      <title>iMXRT 1176 not booting from application code (Error: Wire Ack Fault - target connected?)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMXRT-1176-not-booting-from-application-code-Error-Wire-Ack/m-p/1539061#M196476</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We have a MaaXBoard RT running with iMXRT 1176 with external Octal SPI flash. We have developed driver and created .cfx file.&amp;nbsp;&lt;/P&gt;&lt;P&gt;The driver is verified by using Boot utility tool as well as MCUXpresso GUI Flash tool. We are able to successfully Program/Read/Erase extenal flash. So, the driver seems to be working fine.&lt;/P&gt;&lt;P&gt;We are getting an issue during boot-up after loading application file. The MCU boots to flashloader instead of application file.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Below is the console log displayed:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;MCUXpresso IDE RedlinkMulti Driver v11.6 (Jul 12 2022 16:58:24 - crt_emu_cm_redlink build 4)&lt;BR /&gt;Found chip XML file in ../flash_cli_freertos_hello_cm7/Debug\MIMXRT1176xxxxx.xml&lt;BR /&gt;( 5) Remote configuration complete&lt;BR /&gt;Reconnected to existing LinkServer process.&lt;BR /&gt;============= SCRIPT: RT1170_connect_M7_wake_M4.scp =============&lt;BR /&gt;RT1170 Connect M7 and Wake M4 Script&lt;BR /&gt;DpID = 6BA02477&lt;BR /&gt;APID = 0x84770001&lt;BR /&gt;Setting M4 spin code&lt;BR /&gt;Setting M4 clock&lt;BR /&gt;Resetting M4 core&lt;BR /&gt;Releasing M4&lt;BR /&gt;View cores on the DAP AP&lt;BR /&gt;DpID = 6BA02477&lt;BR /&gt;TAP 0: 6BA02477 Core 0: M7 APID: 84770001 ROM Table: E00FD003*&lt;BR /&gt;TAP 0: 6BA02477 Core 1: M4 APID: 24770011 ROM Table: E00FF003&lt;BR /&gt;============= END SCRIPT ========================================&lt;BR /&gt;Probe Firmware: MCU-LINK r0FF CMSIS-DAP V0.078 (NXP Semiconductors)&lt;BR /&gt;Serial Number: XHJPKS3KETS2V&lt;BR /&gt;VID:PID: 1FC9:0143&lt;BR /&gt;USB Path: \\?\hid#vid_1fc9&amp;amp;pid_0143&amp;amp;mi_00#7&amp;amp;13472939&amp;amp;0&amp;amp;0000#{4d1e55b2-f16f-11cf-88cb-001111000030}&lt;BR /&gt;Using memory from core 0 after searching for a good core&lt;BR /&gt;debug interface type = CoreSight DP (DAP DP ID 6BA02477) over SWD TAP 0&lt;BR /&gt;processor type = Cortex-M7 (CPU ID 00000C27) on DAP AP 0&lt;BR /&gt;number of h/w breakpoints = 8&lt;BR /&gt;number of flash patches = 0&lt;BR /&gt;number of h/w watchpoints = 4&lt;BR /&gt;Probe(0): Connected&amp;amp;Reset. DpID: 6BA02477. CpuID: 00000C27. Info: &amp;lt;None&amp;gt;&lt;BR /&gt;Debug protocol: SWD. RTCK: Disabled. Vector catch: Disabled.&lt;BR /&gt;Content of CoreSight Debug ROM(s):&lt;BR /&gt;RBASE E00FD000: CID B105100D PID 000008E88C ROM (type 0x1)&lt;BR /&gt;ROM 1 E00FE000: CID B105100D PID 04000BB4C8 ROM (type 0x1)&lt;BR /&gt;ROM 2 E00FF000: CID B105100D PID 04000BB4C7 ROM (type 0x1)&lt;BR /&gt;ROM 3 E000E000: CID B105E00D PID 04000BB00C Gen SCS (type 0x0)&lt;BR /&gt;ROM 3 E0001000: CID B105E00D PID 04000BB002 Gen DWT (type 0x0)&lt;BR /&gt;ROM 3 E0002000: CID B105E00D PID 04000BB00E Gen (type 0x0)&lt;BR /&gt;ROM 3 E0000000: CID B105E00D PID 04000BB001 Gen ITM (type 0x0)&lt;BR /&gt;ROM 2 E0041000: CID B105900D PID 04001BB975 CSt ARM ETMv4.0 type 0x13 Trace Source - Core&lt;BR /&gt;ROM 2 E0042000: CID B105900D PID 04004BB906 CSt type 0x14 Debug Control - Trigger, e.g. ECT&lt;BR /&gt;ROM 1 E0043000: CID B105900D PID 04001BB908 CSt CSTF type 0x12 Trace Link - Trace funnel/router&lt;BR /&gt;NXP: MIMXRT1176xxxxx&lt;BR /&gt;DAP stride is 1024 bytes (256 words)&lt;BR /&gt;Inspected v.2 External Flash Device on SPI MaaxBoard_RT_OPI.cfx&lt;BR /&gt;Image 'iMXRT1170_SFDP_FlexSPI1_OPI Oct 17 2022 10:32:00'&lt;BR /&gt;Opening flash driver MaaxBoard_RT_OPI.cfx&lt;BR /&gt;Sending VECTRESET to run flash driver&lt;BR /&gt;Flash variant 'iMXRT1170_SFDP_FlexSPI1_OPI Oct 17 2022 10:32:00' detected (32MB = 256*128K at 0x30000000)&lt;BR /&gt;Closing flash driver MaaxBoard_RT_OPI.cfx&lt;BR /&gt;Connected: was_reset=true. was_stopped=false&lt;BR /&gt;Awaiting telnet connection to port 3330 ...&lt;BR /&gt;GDB nonstop mode enabled&lt;BR /&gt;FreeRTOS stack backtrace is disabled in Non-stop mode (use All-stop)&lt;BR /&gt;Opening flash driver MaaxBoard_RT_OPI.cfx (already resident)&lt;BR /&gt;Sending VECTRESET to run flash driver&lt;BR /&gt;Flash variant 'iMXRT1170_SFDP_FlexSPI1_OPI Oct 17 2022 10:32:00' detected (32MB = 256*128K at 0x30000000)&lt;BR /&gt;Writing 59900 bytes to address 0x30000000 in Flash&lt;BR /&gt;Sectors written: 0, unchanged: 1, total: 1&lt;BR /&gt;Erased/Wrote sector 0-0 with 59900 bytes in 28msec&lt;BR /&gt;Closing flash driver MaaxBoard_RT_OPI.cfx&lt;BR /&gt;Flash Write Done&lt;BR /&gt;Flash Program Summary: 59900 bytes in 0.03 seconds (2089.15 KB/sec)&lt;BR /&gt;============= SCRIPT: RT1170_reset.scp =============&lt;BR /&gt;SYSTEM Reset&lt;BR /&gt;DpID = 6BA02477&lt;BR /&gt;APID = 0x84770001&lt;BR /&gt;Tokenizer error - at character '\x9'&lt;BR /&gt;Setting M4 spin code&lt;BR /&gt;Setting M4 clock&lt;BR /&gt;Resetting M4 core&lt;BR /&gt;Releasing M4&lt;BR /&gt;View cores on the DAP AP&lt;BR /&gt;DpID = 6BA02477&lt;BR /&gt;TAP 0: 6BA02477 Core 0: M7 APID: 84770001 ROM Table: E00FD003*&lt;BR /&gt;TAP 0: 6BA02477 Core 1: M4 APID: 24770011 ROM Table: E00FF003&lt;BR /&gt;R15 = 0x00223104&lt;BR /&gt;Error: Wire Ack Fault - target connected?&lt;BR /&gt;Error: Wire Ack Fault - target connected?&lt;BR /&gt;Error: Wire Ack Fault - target connected?&lt;BR /&gt;Error: Wire Ack Fault - target connected?&lt;BR /&gt;Error: Wire Ack Fault - target connected?&lt;BR /&gt;Vector table SP/PC is the reset context.&lt;BR /&gt;PC = 0x00000200&lt;BR /&gt;SP = 0x00000200&lt;BR /&gt;XPSR = 0x01000000&lt;BR /&gt;VTOR = 0x30002000&lt;BR /&gt;Error: Wire Ack Fault - target connected?&lt;BR /&gt;Set DEMCR = 0x010007F1&lt;BR /&gt;Error: Wire Ack Fault - target connected?&lt;BR /&gt;============= END SCRIPT ===========================&lt;BR /&gt;state - running or following reset request - re-read of state failed - rc Nn(05). Wire ACK Fault in DAP access&lt;BR /&gt;state - running or following reset request - re-read of state failed - rc Nn(05). Wire ACK Fault in DAP access&lt;BR /&gt;state - running or following reset request - re-read of state failed - rc Nn(05). Wire ACK Fault in DAP access&lt;BR /&gt;following reset read of core registers failed - Ep(08). Cannot access core regs when target running.&lt;BR /&gt;Target error from Commit Flash write: Ep(08). Cannot access core regs when target running.&lt;BR /&gt;GDB stub (C:\nxp\MCUXpressoIDE_11.6.0_8187\ide\plugins\com.nxp.mcuxpresso.tools.bin.win32_11.6.0.202207121507\binaries\crt_emu_cm_redlink) terminating - GDB protocol problem: Pipe has been closed by GDB.&lt;BR /&gt;state - running or following reset request - re-read of state failed - rc Nn(05). Wire ACK Fault in DAP access&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;LI-PRODUCT title="iMXRT1170" id="iMXRT1170"&gt;&lt;/LI-PRODUCT&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 18 Oct 2022 07:35:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMXRT-1176-not-booting-from-application-code-Error-Wire-Ack/m-p/1539061#M196476</guid>
      <dc:creator>HMUser</dc:creator>
      <dc:date>2022-10-18T07:35:02Z</dc:date>
    </item>
    <item>
      <title>Re: iMXRT 1176 not booting from application code (Error: Wire Ack Fault - target connected?)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMXRT-1176-not-booting-from-application-code-Error-Wire-Ack/m-p/1540739#M196593</link>
      <description>&lt;P&gt;Your created flash algo file is MaaxBoard_RT_OPI.cfx? does it enable OPI mode for flash during downloading? if so, there may be ROM boot issue after core softreset. as BootROM always try to read boot header from flash via SPI mode then switch flash to OPI mode, but you have enabled OPI in flashloader, BootROM cannot read boot header properly.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;You can refer to below blog (it is in chinese) to enable BootROM SW reset function to fix this issue.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.cnblogs.com/henjay724/p/15085155.html" target="_blank"&gt;https://www.cnblogs.com/henjay724/p/15085155.html&lt;/A&gt;&lt;/P&gt;
&lt;LI-CODE lang="c"&gt;const flexspi_nor_config_t flash_config = {
    .flashStateCtx = 0x07008200u,  //!&amp;lt; [0x1d4-0x1d7] //
};&lt;/LI-CODE&gt;
&lt;P&gt;&amp;nbsp; &lt;/P&gt;</description>
      <pubDate>Thu, 20 Oct 2022 05:00:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMXRT-1176-not-booting-from-application-code-Error-Wire-Ack/m-p/1540739#M196593</guid>
      <dc:creator>jay_heng</dc:creator>
      <dc:date>2022-10-20T05:00:56Z</dc:date>
    </item>
    <item>
      <title>Re: iMXRT 1176 not booting from application code (Error: Wire Ack Fault - target connected?)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMXRT-1176-not-booting-from-application-code-Error-Wire-Ack/m-p/1543777#M196841</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/40101"&gt;@jay_heng&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks a lot for your reply.&lt;/P&gt;&lt;P&gt;The blog is very much informative. Yes, the driver does enable OPI mode during flash image download.&lt;/P&gt;&lt;P&gt;As per the blog, there are 3 ways to reset external flash and also it is necessary to reset flash along with soft reset.&lt;/P&gt;&lt;P&gt;One way to reset is using hardware pin RESET# from flash.&lt;/P&gt;&lt;P&gt;We have developed Octal flash driver on the basis of&amp;nbsp;iMXRT117x_FlexSPI_SFDP project.&lt;/P&gt;&lt;P&gt;The flash driver project from NXP (iMXRT117x_FlexSPI_SFDP) uses GPIO_AD_03 as RESET#, but we need to use&amp;nbsp;GPIO_SD_B2_11 to reset flash.&lt;/P&gt;&lt;P&gt;Below code section is from&amp;nbsp;iMXRT117x_FlexSPI_SFDP, which resets flash using RESET# pin.&lt;/P&gt;&lt;P&gt;// ****************&lt;BR /&gt;// Reset external flash via GPIO&lt;/P&gt;&lt;P&gt;// The problem with the external flash reset is that the actual pin&lt;BR /&gt;// that is being used is board-specific: EVK boards use GPIO_AD_03,&lt;BR /&gt;// but custom boards can use anything!&lt;BR /&gt;// Please update this section accordingly&lt;BR /&gt;// GPIO_AD_03 -&amp;gt; routed to GPIO port 9, pin 2&lt;BR /&gt;#define PIN_MASK (1 &amp;lt;&amp;lt; 2)&lt;/P&gt;&lt;P&gt;// Enable clock to IOMUX (LPCG49)&lt;BR /&gt;uint32_t lpcg = MEM_ReadU32(0x40cc6620);&lt;BR /&gt;if (!(lpcg &amp;amp; 1))&lt;BR /&gt;{&lt;BR /&gt;// CCM-&amp;gt;LPCG49 = EN (IOMUX)&lt;BR /&gt;MEM_WriteU32(0x40cc6620, (lpcg | 1));&lt;BR /&gt;__asm volatile ("dsb 0xF":::"memory");&lt;BR /&gt;__asm volatile ("isb 0xF":::"memory");&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;// Enable clock to GPIO_9 (LPCG51)&lt;BR /&gt;lpcg = MEM_ReadU32(0x40cc6660);&lt;BR /&gt;if (!(lpcg &amp;amp; 1))&lt;BR /&gt;{&lt;BR /&gt;// CCM-&amp;gt;LPCG51 = EN (GPIO_9)&lt;BR /&gt;MEM_WriteU32(0x40cc6660, (lpcg | 1));&lt;BR /&gt;__asm volatile ("dsb 0xF":::"memory");&lt;BR /&gt;__asm volatile ("isb 0xF":::"memory");&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;// Disable interrupt GPIO9-&amp;gt;IMR &amp;amp;= ~(1 &amp;lt;&amp;lt; pin)&lt;BR /&gt;uint32_t imr = MEM_ReadU32(0x40c64014);&lt;BR /&gt;MEM_WriteU32(0x40c64014, imr &amp;amp; ~PIN_MASK);&lt;BR /&gt;// Set DIR (output) GPIO9-&amp;gt;GDIR |= (1 &amp;lt;&amp;lt; pin);&lt;BR /&gt;uint32_t dir = MEM_ReadU32(0x40c64004);&lt;BR /&gt;MEM_WriteU32(0x40c64004, dir | PIN_MASK);&lt;BR /&gt;// Drive high GPIO9-&amp;gt;DR_SET = (1 &amp;lt;&amp;lt; pin);&lt;BR /&gt;MEM_WriteU32(0x40c64084, PIN_MASK);&lt;/P&gt;&lt;P&gt;// Route to GPIO IOMUX-&amp;gt;SW_MUX_CTL_PAD_GPIO_AD_03 = 0xA&lt;BR /&gt;MEM_WriteU32(0x400e8118, 0xa);&lt;/P&gt;&lt;P&gt;MEM_WriteU32(0x400e835cu, 0x12);&lt;/P&gt;&lt;P&gt;// Toggle GPIO9-&amp;gt;DR_TOGGLE = (1 &amp;lt;&amp;lt; pin);&lt;BR /&gt;MEM_WriteU32(0x40c6408c, PIN_MASK);&lt;BR /&gt;// Delay some time to reset external flash&lt;BR /&gt;for (uint32_t i = 0; i &amp;lt; 3000000; i++)&lt;BR /&gt;__asm volatile ("nop");&lt;BR /&gt;// Toggle GPIO9-&amp;gt;DR_TOGGLE = (1 &amp;lt;&amp;lt; pin);&lt;BR /&gt;MEM_WriteU32(0x40c6408c, PIN_MASK);&lt;BR /&gt;for (uint32_t i = 0; i &amp;lt; 3000000; i++)&lt;BR /&gt;__asm volatile ("nop");&lt;BR /&gt;// ****************&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Could you please guide me on how to do above operation from gpio pin&amp;nbsp;GPIO_SD_B2_11?&lt;/P&gt;</description>
      <pubDate>Wed, 26 Oct 2022 05:15:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMXRT-1176-not-booting-from-application-code-Error-Wire-Ack/m-p/1543777#M196841</guid>
      <dc:creator>HMUser</dc:creator>
      <dc:date>2022-10-26T05:15:05Z</dc:date>
    </item>
    <item>
      <title>Re: iMXRT 1176 not booting from application code (Error: Wire Ack Fault - target connected?)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMXRT-1176-not-booting-from-application-code-Error-Wire-Ack/m-p/1545008#M196932</link>
      <description>&lt;P&gt;GPIO_AD_03 -&amp;gt; GPIO9[2]&lt;/P&gt;
&lt;P&gt;GPIO_SD_B2_11 -&amp;gt; GPIO10[20]&lt;/P&gt;
&lt;P&gt;You can refer to below example for GPIO operation:&lt;/P&gt;
&lt;P&gt;\SDK_2.12.0_MIMXRT1170-EVK\boards\evkmimxrt1170\driver_examples\gpio\led_output&lt;/P&gt;</description>
      <pubDate>Thu, 27 Oct 2022 12:02:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMXRT-1176-not-booting-from-application-code-Error-Wire-Ack/m-p/1545008#M196932</guid>
      <dc:creator>jay_heng</dc:creator>
      <dc:date>2022-10-27T12:02:27Z</dc:date>
    </item>
    <item>
      <title>Re: iMXRT 1176 not booting from application code (Error: Wire Ack Fault - target connected?)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMXRT-1176-not-booting-from-application-code-Error-Wire-Ack/m-p/1555965#M197688</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/40101"&gt;@jay_heng&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for the reply.&lt;/P&gt;&lt;P&gt;Sorry, for the late response.&lt;/P&gt;&lt;P&gt;I was able to reset the external flash using HW #RESET pin. But, still no luck with the issue. I'm facing same issue.&lt;/P&gt;&lt;P&gt;I was going through the blog&amp;nbsp;&lt;A href="https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/RT1170-Octal-flash-enablement/ta-p/1498369" target="_self"&gt;https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/RT1170-Octal-flash-enablement/ta-p/1498369&lt;/A&gt;.&amp;nbsp;&amp;nbsp;And found that LUT under&amp;nbsp;&lt;STRONG&gt;FDCB&amp;nbsp;&lt;/STRONG&gt;is key to resolve the issue.&lt;/P&gt;&lt;P&gt;Can you please help us with more information on what must be included in&amp;nbsp;&lt;STRONG&gt;const flexspi_nor_config_t octalflashconfig?&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;Currently, I'm using below configuration -&lt;/P&gt;&lt;P&gt;const flexspi_nor_config_t octalflash_config = {&lt;BR /&gt;.memConfig =&lt;BR /&gt;{&lt;BR /&gt;.tag = FLEXSPI_CFG_BLK_TAG,&lt;BR /&gt;.version = FLEXSPI_CFG_BLK_VERSION,&lt;BR /&gt;.readSampleClkSrc =kFlexSPIReadSampleClk_ExternalInputFromDqsPad,&lt;BR /&gt;.csHoldTime = 3,&lt;BR /&gt;.csSetupTime = 3,&lt;BR /&gt;.deviceModeCfgEnable = 1,&lt;BR /&gt;.deviceModeType = kDeviceConfigCmdType_Spi2Xpi,&lt;BR /&gt;.waitTimeCfgCommands = 1,&lt;BR /&gt;.deviceModeSeq =&lt;BR /&gt;{&lt;BR /&gt;.seqNum = 1,&lt;BR /&gt;.seqId = 6, /* See Lookup table for more details */&lt;BR /&gt;.reserved = 0,&lt;BR /&gt;},&lt;BR /&gt;.deviceModeArg = 0xE7, /* Enable OPI DDR mode */&lt;BR /&gt;.controllerMiscOption =&lt;BR /&gt;(1u &amp;lt;&amp;lt; kFlexSpiMiscOffset_DdrModeEnable) |// (1u &amp;lt;&amp;lt; kFlexSpiMiscOffset_WordAddressableEnable) |&lt;BR /&gt;(1u &amp;lt;&amp;lt; kFlexSpiMiscOffset_SafeConfigFreqEnable),// | (1u &amp;lt;&amp;lt; kFlexSpiMiscOffset_DiffClkEnable,// | (1u &amp;lt;&amp;lt; kFlexSpiMiscOffset_ParallelEnable),&lt;BR /&gt;.deviceType = kFlexSpiDeviceType_SerialNOR,&lt;BR /&gt;.sflashPadType = kSerialFlash_8Pads,&lt;BR /&gt;.serialClkFreq = kFlexSpiSerialClk_166MHz,&lt;BR /&gt;.sflashA1Size = 32ul * 1024u * 1024u,&lt;BR /&gt;.dataValidTime ={16u, 16u},&lt;BR /&gt;.busyOffset = 0u,&lt;BR /&gt;.busyBitPolarity = 0u,&lt;BR /&gt;.lookupTable =&lt;BR /&gt;{&lt;BR /&gt;/* Read -DDR */&lt;BR /&gt;// FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_8PAD, 0xFD, RADDR_DDR, FLEXSPI_8PAD, 0x20),&lt;BR /&gt;// FLEXSPI_LUT_SEQ(DUMMY_DDR, FLEXSPI_8PAD, 0x06, READ_DDR, FLEXSPI_8PAD, 0x04)&lt;BR /&gt;[0 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_8PAD, 0xFD, RADDR_DDR, FLEXSPI_8PAD, 0x20),&lt;BR /&gt;[0 + 1] = FLEXSPI_LUT_SEQ(DUMMY_DDR, FLEXSPI_8PAD, 0x25, READ_DDR, FLEXSPI_8PAD, 0x04),&lt;/P&gt;&lt;P&gt;// /* Read Status SPI *///&lt;BR /&gt;[4*1 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04),&lt;BR /&gt;//&lt;BR /&gt;// /* Read Status OPI */&lt;BR /&gt;[4*2 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_8PAD, 0x05, READ_DDR, FLEXSPI_8PAD, 0x04),&lt;BR /&gt;//&lt;BR /&gt;// /* Write enable SPI *///06h&lt;BR /&gt;[4*3 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0),&lt;BR /&gt;// /* Write enable OPI *///06h&lt;BR /&gt;[4*4 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_8PAD, 0x06, STOP, FLEXSPI_1PAD, 0),&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;/* Erase sector */ //21H&lt;BR /&gt;[4*5 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_8PAD, 0x21, RADDR_DDR, FLEXSPI_8PAD, 0x20),&lt;BR /&gt;//&lt;BR /&gt;// //Write Volatile configuration to enable DDR&lt;BR /&gt;[4*6 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x81, CMD_SDR, FLEXSPI_1PAD, 0x00),&lt;BR /&gt;[4*6 + 1] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x00, CMD_SDR, FLEXSPI_1PAD, 0x00),&lt;BR /&gt;[4*6 + 2] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x1, STOP, FLEXSPI_1PAD, 0),&lt;BR /&gt;//&lt;BR /&gt;/*block erase*/ //DC&lt;BR /&gt;[4*8 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_8PAD, 0xDC, RADDR_DDR, FLEXSPI_8PAD, 0x20),&lt;/P&gt;&lt;P&gt;/*page program*/ //12H&lt;BR /&gt;[4*9 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_8PAD, 0x12, RADDR_DDR, FLEXSPI_8PAD, 0x20),&lt;BR /&gt;[4*9 + 1] = FLEXSPI_LUT_SEQ(WRITE_DDR, FLEXSPI_8PAD, 0x04, STOP, FLEXSPI_1PAD, 0),&lt;/P&gt;&lt;P&gt;/* Chip Erase (CE) Sequence *///60&lt;BR /&gt;[4*11 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_8PAD, 0x60, STOP, FLEXSPI_1PAD, 0),&lt;/P&gt;&lt;P&gt;},&lt;BR /&gt;},&lt;BR /&gt;.pageSize = 256u,&lt;BR /&gt;.sectorSize = 128u * 1024u,&lt;BR /&gt;.blockSize = 128u * 1024u,&lt;BR /&gt;.isUniformBlockSize = true,&lt;BR /&gt;.serialNorType = 0x02,&lt;BR /&gt;.flashStateCtx = 0x07008200u,&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;Could you please the verify the above configuration for octal flash IS25WX256?&lt;/P&gt;</description>
      <pubDate>Thu, 17 Nov 2022 18:40:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMXRT-1176-not-booting-from-application-code-Error-Wire-Ack/m-p/1555965#M197688</guid>
      <dc:creator>HMUser</dc:creator>
      <dc:date>2022-11-17T18:40:05Z</dc:date>
    </item>
    <item>
      <title>Re: iMXRT 1176 not booting from application code (Error: Wire Ack Fault - target connected?)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMXRT-1176-not-booting-from-application-code-Error-Wire-Ack/m-p/1557436#M197800</link>
      <description>&lt;P&gt;Please refer to attached FDCB we have ever used for Micron MT35XU512.&lt;/P&gt;
&lt;P&gt;From cmd set, IS25WX256 is same as MT35XU512&lt;/P&gt;
&lt;P&gt;Besides i have created one project to test all kinds of Flash, IS25WX256 is covered.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://github.com/JayHeng/RT-MFB/tree/main/boards/mimxrt/mfb_fw/src" target="_blank"&gt;https://github.com/JayHeng/RT-MFB/tree/main/boards/mimxrt/mfb_fw/src&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 22 Nov 2022 03:15:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMXRT-1176-not-booting-from-application-code-Error-Wire-Ack/m-p/1557436#M197800</guid>
      <dc:creator>jay_heng</dc:creator>
      <dc:date>2022-11-22T03:15:23Z</dc:date>
    </item>
    <item>
      <title>Re: iMXRT 1176 not booting from application code (Error: Wire Ack Fault - target connected?)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMXRT-1176-not-booting-from-application-code-Error-Wire-Ack/m-p/1557842#M197846</link>
      <description>&lt;P&gt;Thanks a lot for sharing the project.&lt;/P&gt;&lt;P&gt;I'm able to successfully execute the application code(LED blinky), which is stored in external octal flash using the shared mfb project to jump to the application address. The mfb project was selected to "Link application to RAM" configuration in the above process.&lt;/P&gt;&lt;P&gt;What we are trying to do is, to run the external application code without the need of secondary bootloader (mfb project). Can you please help us in this direction?&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;If we try to debug the application code with the updated &lt;STRONG&gt;FDCB&amp;nbsp;&lt;/STRONG&gt;and &lt;STRONG&gt;unchecking&amp;nbsp;&lt;/STRONG&gt;the "Link application to RAM", we are still getting same error logs.&lt;/P&gt;&lt;P&gt;Below image is for your reference.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="HMUser_0-1669122735672.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/201271iD8737BDED9DE1C4F/image-size/medium?v=v2&amp;amp;px=400" role="button" title="HMUser_0-1669122735672.png" alt="HMUser_0-1669122735672.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 22 Nov 2022 13:18:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMXRT-1176-not-booting-from-application-code-Error-Wire-Ack/m-p/1557842#M197846</guid>
      <dc:creator>HMUser</dc:creator>
      <dc:date>2022-11-22T13:18:48Z</dc:date>
    </item>
    <item>
      <title>Re: iMXRT 1176 not booting from application code (Error: Wire Ack Fault - target connected?)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMXRT-1176-not-booting-from-application-code-Error-Wire-Ack/m-p/1567230#M198543</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/40101"&gt;@jay_heng&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Could you please help us to resolve the issue?&lt;/P&gt;&lt;P&gt;We have further analyzed the logs of&amp;nbsp;RT1170_reset.scp, we found that the&amp;nbsp;&lt;STRONG&gt;"Error: Wire Ack Fault - target connected?" &lt;/STRONG&gt;comes soon after the operation&amp;nbsp;&lt;STRONG&gt;"b% = Peek32 This d%", i.e.,&lt;/STRONG&gt; at the address&amp;nbsp;0x3000200 where vector table is located.&lt;/P&gt;&lt;P&gt;We have verified the application hex file. The application file has valid vector table at address 0x300200. But the script is not able to read the contents of vector table.&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 09 Dec 2022 04:39:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMXRT-1176-not-booting-from-application-code-Error-Wire-Ack/m-p/1567230#M198543</guid>
      <dc:creator>HMUser</dc:creator>
      <dc:date>2022-12-09T04:39:03Z</dc:date>
    </item>
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