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    <title>topic Peripheral Sharing between M7 and A53 on IMX8MP in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Peripheral-Sharing-between-M7-and-A53-on-IMX8MP/m-p/1542589#M196760</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I would like to use UART3 both on A53 and M7. In other posts I read, that using shared peripherals is quite complicated and things need to be changed in the kernel (&lt;A href="https://community.nxp.com/t5/i-MX-Processors/Is-there-a-demo-source-code-for-peripheral-sharing-between-Linux/m-p/723937" target="_blank"&gt;https://community.nxp.com/t5/i-MX-Processors/Is-there-a-demo-source-code-for-peripheral-sharing-between-Linux/m-p/723937&lt;/A&gt;).&amp;nbsp;&lt;/P&gt;&lt;P&gt;In my case I don't want to access peripherals simultaneously!&lt;/P&gt;&lt;P&gt;The idea is to use the UART3 on A53 for initialization/update sequence with a slave device. After the sequence the UART3 is unbind from the A53 and simultaneous access is prohibited in this way.&lt;/P&gt;&lt;P&gt;Then the firmware is started on the M7 core and UART3 is used there to get data from the slave device frequently. If another initialization sequence/update is needed, the firmware will be stopped on M7 and the UART is bind to the A53 again.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Can you give me a opinion and point out upcoming risks, implementing this approach with bind/unbind a serial device on A53 start/stop the firmware on M7?&lt;/P&gt;&lt;PRE&gt;echo stop &amp;gt;/sys/class/remoteproc/remoteproc&lt;SPAN&gt;X&lt;/SPAN&gt;/state&lt;BR /&gt;echo 30880000.serial &amp;gt; /sys/bus/platform/drivers/imx-uart/bind&lt;BR /&gt;// do init sequence... &lt;BR /&gt;echo 30880000.serial &amp;gt; /sys/bus/platform/drivers/imx-uart/unbind&lt;BR /&gt;echo start &amp;gt;/sys/class/remoteproc/remoteproc&lt;SPAN&gt;X&lt;/SPAN&gt;/state&lt;BR /&gt;// run application...&lt;/PRE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Mon, 24 Oct 2022 09:05:19 GMT</pubDate>
    <dc:creator>fladan</dc:creator>
    <dc:date>2022-10-24T09:05:19Z</dc:date>
    <item>
      <title>Peripheral Sharing between M7 and A53 on IMX8MP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Peripheral-Sharing-between-M7-and-A53-on-IMX8MP/m-p/1542589#M196760</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I would like to use UART3 both on A53 and M7. In other posts I read, that using shared peripherals is quite complicated and things need to be changed in the kernel (&lt;A href="https://community.nxp.com/t5/i-MX-Processors/Is-there-a-demo-source-code-for-peripheral-sharing-between-Linux/m-p/723937" target="_blank"&gt;https://community.nxp.com/t5/i-MX-Processors/Is-there-a-demo-source-code-for-peripheral-sharing-between-Linux/m-p/723937&lt;/A&gt;).&amp;nbsp;&lt;/P&gt;&lt;P&gt;In my case I don't want to access peripherals simultaneously!&lt;/P&gt;&lt;P&gt;The idea is to use the UART3 on A53 for initialization/update sequence with a slave device. After the sequence the UART3 is unbind from the A53 and simultaneous access is prohibited in this way.&lt;/P&gt;&lt;P&gt;Then the firmware is started on the M7 core and UART3 is used there to get data from the slave device frequently. If another initialization sequence/update is needed, the firmware will be stopped on M7 and the UART is bind to the A53 again.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Can you give me a opinion and point out upcoming risks, implementing this approach with bind/unbind a serial device on A53 start/stop the firmware on M7?&lt;/P&gt;&lt;PRE&gt;echo stop &amp;gt;/sys/class/remoteproc/remoteproc&lt;SPAN&gt;X&lt;/SPAN&gt;/state&lt;BR /&gt;echo 30880000.serial &amp;gt; /sys/bus/platform/drivers/imx-uart/bind&lt;BR /&gt;// do init sequence... &lt;BR /&gt;echo 30880000.serial &amp;gt; /sys/bus/platform/drivers/imx-uart/unbind&lt;BR /&gt;echo start &amp;gt;/sys/class/remoteproc/remoteproc&lt;SPAN&gt;X&lt;/SPAN&gt;/state&lt;BR /&gt;// run application...&lt;/PRE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 24 Oct 2022 09:05:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Peripheral-Sharing-between-M7-and-A53-on-IMX8MP/m-p/1542589#M196760</guid>
      <dc:creator>fladan</dc:creator>
      <dc:date>2022-10-24T09:05:19Z</dc:date>
    </item>
    <item>
      <title>Re: Peripheral Sharing between M7 and A53 on IMX8MP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Peripheral-Sharing-between-M7-and-A53-on-IMX8MP/m-p/1544166#M196876</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;This is a bit difficult, since the domain of the UART3 is in&amp;nbsp; the Cortex A53, this include the peripheral, clocks and pads, unless otherwise set. It is not as easy as to unbind and bind the device.&lt;BR /&gt;&lt;BR /&gt;I would suggest that one of the two Cores, I would say the M7, have the UART3 domain at all times and initialize/update sequence is performed by A53 by sending messages to M7 through RPMSG.&lt;BR /&gt;&lt;BR /&gt;Similar application as in demo app sai_low_power_audio available in SDK package at &amp;lt;SDK installation path\boards\evkmimx8mn\demo_apps&amp;gt;&lt;BR /&gt;&lt;BR /&gt;Best regards,&lt;BR /&gt;Aldo.&lt;/P&gt;</description>
      <pubDate>Wed, 26 Oct 2022 15:40:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Peripheral-Sharing-between-M7-and-A53-on-IMX8MP/m-p/1544166#M196876</guid>
      <dc:creator>AldoG</dc:creator>
      <dc:date>2022-10-26T15:40:43Z</dc:date>
    </item>
    <item>
      <title>Re: Peripheral Sharing between M7 and A53 on IMX8MP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Peripheral-Sharing-between-M7-and-A53-on-IMX8MP/m-p/1544772#M196913</link>
      <description>&lt;P&gt;Hello Aldo,&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;thank's for your reply. The procedure I mentioned in my post, works for me already in reality. I tried it on the eval kit and it seems to work.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;When the UART3 is unbind from the A53 and a new firmware is flashed on the M7, which configures the UART, I don't see what can go wrong. Do you have an opinion on this?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Having UART3 on the M7 domain and using RPMSG is my fallback solution and already implemented. I will have a look on the example you mentioned, thanks.&lt;BR /&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;SPAN&gt;BR,&lt;BR /&gt;Daniel&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 27 Oct 2022 07:02:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Peripheral-Sharing-between-M7-and-A53-on-IMX8MP/m-p/1544772#M196913</guid>
      <dc:creator>fladan</dc:creator>
      <dc:date>2022-10-27T07:02:16Z</dc:date>
    </item>
    <item>
      <title>Re: Peripheral Sharing between M7 and A53 on IMX8MP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Peripheral-Sharing-between-M7-and-A53-on-IMX8MP/m-p/1545188#M196944</link>
      <description>&lt;P&gt;Hi,&lt;BR /&gt;&lt;BR /&gt;Your implementation looks fine, the only drawback is that you'll need to re-configure UART3 each time you bind and unbind your device, with the other solution you'll have full control of the peripheral at all time in the M7 side.&lt;BR /&gt;&lt;BR /&gt;If this is not an issue for your application then it is ok.&lt;BR /&gt;&lt;BR /&gt;Best regards,&lt;BR /&gt;Aldo.&lt;/P&gt;</description>
      <pubDate>Thu, 27 Oct 2022 17:14:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Peripheral-Sharing-between-M7-and-A53-on-IMX8MP/m-p/1545188#M196944</guid>
      <dc:creator>AldoG</dc:creator>
      <dc:date>2022-10-27T17:14:12Z</dc:date>
    </item>
    <item>
      <title>Re: Peripheral Sharing between M7 and A53 on IMX8MP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Peripheral-Sharing-between-M7-and-A53-on-IMX8MP/m-p/1545599#M196977</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;thanks again. I will think about both solutions and decide which is better in my case.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;BR,&lt;/P&gt;&lt;P&gt;Daniel&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 28 Oct 2022 08:55:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Peripheral-Sharing-between-M7-and-A53-on-IMX8MP/m-p/1545599#M196977</guid>
      <dc:creator>fladan</dc:creator>
      <dc:date>2022-10-28T08:55:11Z</dc:date>
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