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    <title>topic Re: i.MX8 - ETHERNET PHY in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-ETHERNET-PHY/m-p/1541712#M196666</link>
    <description>&lt;P&gt;Any update ?&lt;/P&gt;</description>
    <pubDate>Fri, 21 Oct 2022 06:59:25 GMT</pubDate>
    <dc:creator>Chethanbg</dc:creator>
    <dc:date>2022-10-21T06:59:25Z</dc:date>
    <item>
      <title>i.MX8 - ETHERNET PHY</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-ETHERNET-PHY/m-p/1537132#M196332</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;we are using&amp;nbsp;MiMX8DX6AVLFZAC Processor for our custom board with&amp;nbsp;KSZ8041RNLU phy transeiver in&amp;nbsp;10Base-T/100Base-TX PHY with RMII Support what should be the mode and phy address setting to be done?&lt;/P&gt;&lt;P&gt;Attached is the SCH for your reference.&lt;/P&gt;</description>
      <pubDate>Thu, 13 Oct 2022 13:08:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-ETHERNET-PHY/m-p/1537132#M196332</guid>
      <dc:creator>Chethanbg</dc:creator>
      <dc:date>2022-10-13T13:08:03Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8 - ETHERNET PHY</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-ETHERNET-PHY/m-p/1541712#M196666</link>
      <description>&lt;P&gt;Any update ?&lt;/P&gt;</description>
      <pubDate>Fri, 21 Oct 2022 06:59:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-ETHERNET-PHY/m-p/1541712#M196666</guid>
      <dc:creator>Chethanbg</dc:creator>
      <dc:date>2022-10-21T06:59:25Z</dc:date>
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