i.MX Processors中的主题 Re: imx8mn bootrom and JTAG debug

imx8mn bootrom and JTAG debug

tylernol — Mon, 19 Sep 2022 21:14:41 GMT

hi there,

I am bringing up a new custom board designed with the imx8mn and have been able to properly calibrate the new LPDDR4 and flash our image into the mmc. A key difference is that we have changed the following sd/emmc setup:

EVK:

SD1: 4 bit wifi
SD2: 4 bit microsd
SD3: 8 bit emmc

Processor board:
SD1 : 8 bit emmc
SD2 : 4 bit wifi
SD3: unused.

I believe i have modified our own uboot board properly for the location shift, and I have also set the boot fuse to boot from SD1 when boot_mode[] is set to b0000. However, the board does not boot when reset with boot_mode[] = b0000. I see some garbage on the uart output. The bootROM comes back up in serial download mode. So either it encountered an error with boot from fuses or it thinks it is still booting from serial.

As an attempt to debug this, I have also connected JTAG but cannot get it to initialize.

Are there any gotchas for getting JTAG to work for the imx8mn? I have not set any fuses related to JTAG so it should be open.

Also is there an updated porting guide for updating uboot with imx8* processors to verify I have not missed anything related to the port change ? The one guide I found posted is a bit out of date.

thanks,

-Tyler

Re: imx8mn bootrom and JTAG debug

Rita_Wang — Wed, 21 Sep 2022 04:09:13 GMT

Here recommend you to use the usb uart port to debug, not use the jtag. For the usb port is convenient .

I thinks your problem is caused by the emmc design and use, as our default design and software setting for the emmc is SD3, here you using the SD1, so have you modified all related setting for it, you need to check and confirm.

Re: imx8mn bootrom and JTAG debug

tylernol — Tue, 04 Oct 2022 20:28:16 GMT

we are still having issues with this. One thing I have noticed in our board design for the boot_mode pins is that we have boot_mode2 and boot_mode3 disconnected. In the hw documentation, it appears as though there is an internal pulldown on these pins so it should read as logic 0. Is that correct or is it mandatory that we pull the pin down to 0 (we want both as zero), there is also a app note https://www.nxp.com/docs/en/application-note/AN12667.pdf, that appears to specify that a pull down or up is needed for these two pins.

When we read the status register in UUU SPL uboot, we seem to see those bits cleared, but I am not certain if that is what the BOOTROM process sees:

```

u-boot=> md.l 0x30390070 1
30390070: 01050009                               ....
u-boot=>

Re: imx8mn bootrom and JTAG debug

Rita_Wang — Wed, 12 Oct 2022 07:49:34 GMT