i.MX8dxl eqos ethernet fixed-link: Failed to reset the dma

catwich — Sat, 27 Aug 2022 14:12:46 GMT

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We are trying to enable the second network port (ENET1) on a custom i.MX8dxl board, with lf-5.15.5-1.0.0.
However we encounter somewhat obscure error messages on the console when trying to bring up a link:

root@2a473698774a:~# ip link set dev eth0 up [ 166.341902] imx-dwmac 5b050000.ethernet eth0: Register MEM_TYPE_PAGE_POOL RxQ-0 [ 167.355265] imx-dwmac 5b050000.ethernet: Failed to reset the dma [ 167.361354] imx-dwmac 5b050000.ethernet eth0: stmmac_hw_setup: DMA engine initialization failed [ 167.370371] imx-dwmac 5b050000.ethernet eth0: stmmac_open: Hw setup failed RTNETLINK answers: Connection timed out

I noticed many questions about similar errors on the i.MX8M Plus - but they are (probably) not applicable in our case because we want to connect directly to an SJA1110a switch using rgmii without a dedicated phy in between.

Our board shares a lot with the EVK, e.g. we can boot the imx8dxl-evk.dtb and try enabling the eqos interface (after replacing the phy with fixed-link in dts) - and still trigger the same error.
So for reference below are the relevant parts of our device-tree, which includes imx8dxl.dtsi at its base:

&iomuxc { pinctrl_eqos: eqosgrp { fsl,pins = < /* MDIO to Switch */ IMX8DXL_ENET0_MDC_CONN_EQOS_MDC 0x06000020 IMX8DXL_ENET0_MDIO_CONN_EQOS_MDIO 0x06000020 /* RGMII to Switch */ IMX8DXL_ENET1_RGMII_TX_CTL_CONN_EQOS_RGMII_TX_CTL 0x06000020 IMX8DXL_ENET1_RGMII_TXC_CONN_EQOS_RGMII_TXC 0x06000020 IMX8DXL_ENET1_RGMII_TXD0_CONN_EQOS_RGMII_TXD0 0x06000020 IMX8DXL_ENET1_RGMII_TXD1_CONN_EQOS_RGMII_TXD1 0x06000020 IMX8DXL_ENET1_RGMII_TXD2_CONN_EQOS_RGMII_TXD2 0x06000020 IMX8DXL_ENET1_RGMII_TXD3_CONN_EQOS_RGMII_TXD3 0x06000020 IMX8DXL_ENET1_RGMII_RXC_CONN_EQOS_RGMII_RXC 0x06000020 IMX8DXL_ENET1_RGMII_RX_CTL_CONN_EQOS_RGMII_RX_CTL 0x06000020 IMX8DXL_ENET1_RGMII_RXD0_CONN_EQOS_RGMII_RXD0 0x06000020 IMX8DXL_ENET1_RGMII_RXD1_CONN_EQOS_RGMII_RXD1 0x06000020 IMX8DXL_ENET1_RGMII_RXD2_CONN_EQOS_RGMII_RXD2 0x06000020 IMX8DXL_ENET1_RGMII_RXD3_CONN_EQOS_RGMII_RXD3 0x06000020 >; }; }; &eqos { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_eqos>; phy-mode = "rgmii-id"; status = "okay"; fixed-link { speed = <1000>; full-duplex; }; };

Also please find the full boot log attached ...

Re: i.MX8dxl eqos ethernet fixed-link: Failed to reset the dma

catwich — Thu, 06 Oct 2022 12:06:51 GMT

With assistance from NXP we were able to work out the issues from my post above - and do now have rx&tx operating properly between the switch and the SoC eqos.

Essentially the eqos controller requires the rx clock to operate dma.
If anyone else faces this issue - verify that the connected phy or switch provides a clock to the SoC ENET1_RGMII_RXC input.

topic Re: i.MX8dxl eqos ethernet fixed-link: Failed to reset the dma in i.MX Processors

i.MX8dxl eqos ethernet fixed-link: Failed to reset the dma

Re: i.MX8dxl eqos ethernet fixed-link: Failed to reset the dma