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    <title>topic NXP IMX8M PLUS with LPDDR4 Kernel panic.... in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/NXP-IMX8M-PLUS-with-LPDDR4-Kernel-panic/m-p/1530892#M195848</link>
    <description>&lt;P&gt;Hello Nxp,&lt;/P&gt;&lt;P&gt;I have imx8mp EVK with LPDDR4 6 GB ram.&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have generate lpddr_timing.c file with IMX8MP EVK with below configuration in their sheet.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Device Information&lt;/STRONG&gt;&lt;BR /&gt;Memory type:&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; LPDDR4&lt;BR /&gt;Manufacturer:&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; Micron&lt;BR /&gt;Memory part number:&lt;STRONG&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;MT53E1536M32D4DT-046 WT:A&lt;/STRONG&gt;&lt;BR /&gt;Density per channel per chip select (Gb)1:&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;STRONG&gt;3&lt;/STRONG&gt;&lt;BR /&gt;Number of Channels&lt;STRONG&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;2&lt;/STRONG&gt;&lt;BR /&gt;Number of Chip Selects used2&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;2&lt;BR /&gt;Total DRAM density (Gb)&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;STRONG&gt;6&lt;/STRONG&gt;&lt;BR /&gt;Number of ROW Addresses2&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;STRONG&gt;15&lt;/STRONG&gt;&lt;BR /&gt;Number of COLUMN Addresses2&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;STRONG&gt;10&lt;/STRONG&gt;&lt;BR /&gt;Number of BANK addresses2&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;STRONG&gt;3&lt;/STRONG&gt;&lt;BR /&gt;Number of BANKS2&lt;STRONG&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;8&lt;/STRONG&gt;&lt;BR /&gt;Bus Width&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;32&lt;BR /&gt;Clock Cycle Freq (MHz)3&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;2000&lt;BR /&gt;Clock Cycle Time (ns)&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; 0.5&lt;BR /&gt;FREQ1 setpoint Clock Cycle Freq (MHz)&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; 200&lt;BR /&gt;FREQ1 Clock Cycle Time (ns)&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;5&lt;BR /&gt;FREQ2 setpoint Clock Cycle Freq (MHz)&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; 50&lt;BR /&gt;FREQ2 Clock Cycle Time (ns)&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;20&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;DDR STRESS TOOL PASS.&lt;/P&gt;&lt;P&gt;but after that replace lpddr_timing.c file building the source code and flashing in to EVK bootloader is working but kernel is panic.&lt;/P&gt;&lt;P&gt;why above configuration is not working. any thing is missing?&amp;nbsp;&lt;/P&gt;&lt;P&gt;After DDR stress tool pass any modification required in kernel ?&lt;/P&gt;&lt;P&gt;I need suggestion from nxp.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;KERNEL LOG:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;Starting kernel ...&lt;/P&gt;&lt;P&gt;[ 0.000000][ T0] Booting Linux on physical CPU 0x0000000000 [0x410fd034]&lt;BR /&gt;[ 0.000000][ T0] Linux version 5.10.72-g04acc13ba856-dirty (dev1@simpli-aosp-1) (Android (7284624, based on r416183b) clang version 12.0.5 (&lt;A href="https://android.googlesource.com/toolchain/llvm-project" target="_blank"&gt;https://android.googlesource.com/toolchain/llvm-project&lt;/A&gt; c935d99d7cf2016289302412d708641d52d2f7ee), LLD 12.0.5 (/buildbot/src/android/llvm-toolchain/out/llvm-project/lld c935d99d7cf2016289302412d708641d52d2f7ee)) #1 SMP PREEMPT Fri Sep 23 12:13:06 IST 2022&lt;BR /&gt;[ 0.000000][ T0] Machine model: NXP i.MX8MPlus EVK board&lt;BR /&gt;[ 0.000000][ T0] Stack Depot is disabled&lt;BR /&gt;[ 0.000000][ T0] earlycon: ec_imx6q0 at MMIO 0x0000000030890000 (options '115200')&lt;BR /&gt;[ 0.000000][ T0] printk: bootconsole [ec_imx6q0] enabled&lt;BR /&gt;[ 0.000000][ T0] efi: UEFI not found.&lt;BR /&gt;[ 0.000000][ T0] Reserved memory: created DMA memory pool at 0x0000000094300000, size 1 MiB&lt;BR /&gt;[ 0.000000][ T0] OF: reserved mem: initialized node vdev0buffer@94300000, compatible id shared-dma-pool&lt;BR /&gt;[ 0.000000][ T0] Internal error: synchronous external abort: 96000210 [#1] PREEMPT SMP&lt;BR /&gt;[ 0.000000][ T0] Modules linked in:&lt;BR /&gt;[ 0.000000][ T0] CPU: 0 PID: 0 Comm: swapper Not tainted 5.10.72-g04acc13ba856-dirty #1&lt;BR /&gt;[ 0.000000][ T0] Hardware name: NXP i.MX8MPlus EVK board (DT)&lt;BR /&gt;[ 0.000000][ T0] pstate: 60400085 (nZCv daIf +PAN -UAO -TCO BTYPE=--)&lt;BR /&gt;[ 0.000000][ T0] pc : __create_pgd_mapping+0x470/0x878&lt;BR /&gt;[ 0.000000][ T0] lr : 0x40600000&lt;BR /&gt;[ 0.000000][ T0] sp : ffffffc011a63d70&lt;BR /&gt;[ 0.000000][ T0] x29: ffffffc011a63e70 x28: 0050000000000783&lt;BR /&gt;[ 0.000000][ T0] x27: ffffffc010000000 x26: fffffffefe438800&lt;BR /&gt;[ 0.000000][ T0] x25: 0068000000000703 x24: ffd7fffffffff77f&lt;BR /&gt;[ 0.000000][ T0] x23: fffffffefe43a400 x22: ffffffc011c46000&lt;BR /&gt;[ 0.000000][ T0] x21: 0000000000000041 x20: 0040000000000783&lt;BR /&gt;[ 0.000000][ T0] x19: 0000000000000000 x18: ffffffc011a7be70&lt;BR /&gt;[ 0.000000][ T0] x17: 0000000000000005 x16: 00000000f0000000&lt;BR /&gt;[ 0.000000][ T0] x15: 00000001bffff000 x14: 0000000010000000&lt;BR /&gt;[ 0.000000][ T0] x13: ffffffc010f9ffff x12: ffffffc011ffffff&lt;BR /&gt;[ 0.000000][ T0] x11: 0000000000000000 x10: 0000000000000800&lt;BR /&gt;[ 0.000000][ T0] x9 : ffffffc010200000 x8 : 0000000000000000&lt;BR /&gt;[ 0.000000][ T0] x7 : 0040000000000780 x6 : ffffffc010f9ffff&lt;BR /&gt;[ 0.000000][ T0] x5 : 00000fffffefe43b x4 : fffffffefe43a000&lt;BR /&gt;[ 0.000000][ T0] x3 : ffffffc011c47000 x2 : ffffffc011c47000&lt;BR /&gt;[ 0.000000][ T0] x1 : ffffffc010fa0000 x0 : 00000001bffff000&lt;BR /&gt;[ 0.000000][ T0] Call trace:&lt;BR /&gt;[ 0.000000][ T0] __create_pgd_mapping+0x470/0x878&lt;BR /&gt;[ 0.000000][ T0] map_kernel_segment+0x6c/0xe4&lt;BR /&gt;[ 0.000000][ T0] map_kernel+0x88/0x1d0&lt;BR /&gt;[ 0.000000][ T0] paging_init+0x70/0xec&lt;BR /&gt;[ 0.000000][ T0] setup_arch+0x140/0x238&lt;BR /&gt;[ 0.000000][ T0] start_kernel+0x74/0x480&lt;BR /&gt;[ 0.000000][ T0] Code: 910022f7 aa1a03fb 54001ac0 91480369 (f94002e8)&lt;BR /&gt;[ 0.000000][ T0] random: get_random_bytes called from oops_exit+0x38/0x70 with crng_init=0&lt;BR /&gt;[ 0.000000][ T0] ---[ end trace 0000000000000000 ]---&lt;BR /&gt;[ 0.000000][ T0&lt;STRONG&gt;] Kernel panic - not syncing: synchronous external abort: Fatal exception&lt;/STRONG&gt;&lt;BR /&gt;[ 0.000000][ T0] Reboot failed -- System halted&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Fri, 30 Sep 2022 05:54:28 GMT</pubDate>
    <dc:creator>Aditya2125</dc:creator>
    <dc:date>2022-09-30T05:54:28Z</dc:date>
    <item>
      <title>NXP IMX8M PLUS with LPDDR4 Kernel panic....</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/NXP-IMX8M-PLUS-with-LPDDR4-Kernel-panic/m-p/1530892#M195848</link>
      <description>&lt;P&gt;Hello Nxp,&lt;/P&gt;&lt;P&gt;I have imx8mp EVK with LPDDR4 6 GB ram.&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have generate lpddr_timing.c file with IMX8MP EVK with below configuration in their sheet.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Device Information&lt;/STRONG&gt;&lt;BR /&gt;Memory type:&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; LPDDR4&lt;BR /&gt;Manufacturer:&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; Micron&lt;BR /&gt;Memory part number:&lt;STRONG&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;MT53E1536M32D4DT-046 WT:A&lt;/STRONG&gt;&lt;BR /&gt;Density per channel per chip select (Gb)1:&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;STRONG&gt;3&lt;/STRONG&gt;&lt;BR /&gt;Number of Channels&lt;STRONG&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;2&lt;/STRONG&gt;&lt;BR /&gt;Number of Chip Selects used2&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;2&lt;BR /&gt;Total DRAM density (Gb)&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;STRONG&gt;6&lt;/STRONG&gt;&lt;BR /&gt;Number of ROW Addresses2&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;STRONG&gt;15&lt;/STRONG&gt;&lt;BR /&gt;Number of COLUMN Addresses2&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;STRONG&gt;10&lt;/STRONG&gt;&lt;BR /&gt;Number of BANK addresses2&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;STRONG&gt;3&lt;/STRONG&gt;&lt;BR /&gt;Number of BANKS2&lt;STRONG&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;8&lt;/STRONG&gt;&lt;BR /&gt;Bus Width&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;32&lt;BR /&gt;Clock Cycle Freq (MHz)3&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;2000&lt;BR /&gt;Clock Cycle Time (ns)&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; 0.5&lt;BR /&gt;FREQ1 setpoint Clock Cycle Freq (MHz)&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; 200&lt;BR /&gt;FREQ1 Clock Cycle Time (ns)&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;5&lt;BR /&gt;FREQ2 setpoint Clock Cycle Freq (MHz)&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; 50&lt;BR /&gt;FREQ2 Clock Cycle Time (ns)&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;20&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;DDR STRESS TOOL PASS.&lt;/P&gt;&lt;P&gt;but after that replace lpddr_timing.c file building the source code and flashing in to EVK bootloader is working but kernel is panic.&lt;/P&gt;&lt;P&gt;why above configuration is not working. any thing is missing?&amp;nbsp;&lt;/P&gt;&lt;P&gt;After DDR stress tool pass any modification required in kernel ?&lt;/P&gt;&lt;P&gt;I need suggestion from nxp.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;KERNEL LOG:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;Starting kernel ...&lt;/P&gt;&lt;P&gt;[ 0.000000][ T0] Booting Linux on physical CPU 0x0000000000 [0x410fd034]&lt;BR /&gt;[ 0.000000][ T0] Linux version 5.10.72-g04acc13ba856-dirty (dev1@simpli-aosp-1) (Android (7284624, based on r416183b) clang version 12.0.5 (&lt;A href="https://android.googlesource.com/toolchain/llvm-project" target="_blank"&gt;https://android.googlesource.com/toolchain/llvm-project&lt;/A&gt; c935d99d7cf2016289302412d708641d52d2f7ee), LLD 12.0.5 (/buildbot/src/android/llvm-toolchain/out/llvm-project/lld c935d99d7cf2016289302412d708641d52d2f7ee)) #1 SMP PREEMPT Fri Sep 23 12:13:06 IST 2022&lt;BR /&gt;[ 0.000000][ T0] Machine model: NXP i.MX8MPlus EVK board&lt;BR /&gt;[ 0.000000][ T0] Stack Depot is disabled&lt;BR /&gt;[ 0.000000][ T0] earlycon: ec_imx6q0 at MMIO 0x0000000030890000 (options '115200')&lt;BR /&gt;[ 0.000000][ T0] printk: bootconsole [ec_imx6q0] enabled&lt;BR /&gt;[ 0.000000][ T0] efi: UEFI not found.&lt;BR /&gt;[ 0.000000][ T0] Reserved memory: created DMA memory pool at 0x0000000094300000, size 1 MiB&lt;BR /&gt;[ 0.000000][ T0] OF: reserved mem: initialized node vdev0buffer@94300000, compatible id shared-dma-pool&lt;BR /&gt;[ 0.000000][ T0] Internal error: synchronous external abort: 96000210 [#1] PREEMPT SMP&lt;BR /&gt;[ 0.000000][ T0] Modules linked in:&lt;BR /&gt;[ 0.000000][ T0] CPU: 0 PID: 0 Comm: swapper Not tainted 5.10.72-g04acc13ba856-dirty #1&lt;BR /&gt;[ 0.000000][ T0] Hardware name: NXP i.MX8MPlus EVK board (DT)&lt;BR /&gt;[ 0.000000][ T0] pstate: 60400085 (nZCv daIf +PAN -UAO -TCO BTYPE=--)&lt;BR /&gt;[ 0.000000][ T0] pc : __create_pgd_mapping+0x470/0x878&lt;BR /&gt;[ 0.000000][ T0] lr : 0x40600000&lt;BR /&gt;[ 0.000000][ T0] sp : ffffffc011a63d70&lt;BR /&gt;[ 0.000000][ T0] x29: ffffffc011a63e70 x28: 0050000000000783&lt;BR /&gt;[ 0.000000][ T0] x27: ffffffc010000000 x26: fffffffefe438800&lt;BR /&gt;[ 0.000000][ T0] x25: 0068000000000703 x24: ffd7fffffffff77f&lt;BR /&gt;[ 0.000000][ T0] x23: fffffffefe43a400 x22: ffffffc011c46000&lt;BR /&gt;[ 0.000000][ T0] x21: 0000000000000041 x20: 0040000000000783&lt;BR /&gt;[ 0.000000][ T0] x19: 0000000000000000 x18: ffffffc011a7be70&lt;BR /&gt;[ 0.000000][ T0] x17: 0000000000000005 x16: 00000000f0000000&lt;BR /&gt;[ 0.000000][ T0] x15: 00000001bffff000 x14: 0000000010000000&lt;BR /&gt;[ 0.000000][ T0] x13: ffffffc010f9ffff x12: ffffffc011ffffff&lt;BR /&gt;[ 0.000000][ T0] x11: 0000000000000000 x10: 0000000000000800&lt;BR /&gt;[ 0.000000][ T0] x9 : ffffffc010200000 x8 : 0000000000000000&lt;BR /&gt;[ 0.000000][ T0] x7 : 0040000000000780 x6 : ffffffc010f9ffff&lt;BR /&gt;[ 0.000000][ T0] x5 : 00000fffffefe43b x4 : fffffffefe43a000&lt;BR /&gt;[ 0.000000][ T0] x3 : ffffffc011c47000 x2 : ffffffc011c47000&lt;BR /&gt;[ 0.000000][ T0] x1 : ffffffc010fa0000 x0 : 00000001bffff000&lt;BR /&gt;[ 0.000000][ T0] Call trace:&lt;BR /&gt;[ 0.000000][ T0] __create_pgd_mapping+0x470/0x878&lt;BR /&gt;[ 0.000000][ T0] map_kernel_segment+0x6c/0xe4&lt;BR /&gt;[ 0.000000][ T0] map_kernel+0x88/0x1d0&lt;BR /&gt;[ 0.000000][ T0] paging_init+0x70/0xec&lt;BR /&gt;[ 0.000000][ T0] setup_arch+0x140/0x238&lt;BR /&gt;[ 0.000000][ T0] start_kernel+0x74/0x480&lt;BR /&gt;[ 0.000000][ T0] Code: 910022f7 aa1a03fb 54001ac0 91480369 (f94002e8)&lt;BR /&gt;[ 0.000000][ T0] random: get_random_bytes called from oops_exit+0x38/0x70 with crng_init=0&lt;BR /&gt;[ 0.000000][ T0] ---[ end trace 0000000000000000 ]---&lt;BR /&gt;[ 0.000000][ T0&lt;STRONG&gt;] Kernel panic - not syncing: synchronous external abort: Fatal exception&lt;/STRONG&gt;&lt;BR /&gt;[ 0.000000][ T0] Reboot failed -- System halted&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 30 Sep 2022 05:54:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/NXP-IMX8M-PLUS-with-LPDDR4-Kernel-panic/m-p/1530892#M195848</guid>
      <dc:creator>Aditya2125</dc:creator>
      <dc:date>2022-09-30T05:54:28Z</dc:date>
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