Integrating dual MIPI CSI interface in iMX8MP Processor

Amal_Antony3331 — Thu, 15 Sep 2022 06:56:04 GMT

Hi all,

I am trying to integrate mipi camera(IMX219) to our IMX8MP custom board. I have to connect four IMX219 modules to iMX8MP. But it is having only 2 CSI interfaces, I'm doing it using an i2c MUX and two MIPI switches.

I'm able to get the stream from the CSI0 interface(both channel 1 and channel 2). But not with CSI1 interface (Channel 3 and channel 4). Getting the following error upon accessing the channel 3.

ERROR : [MediaPipeline] NativeSensor open error!
ERROR : [V4l2Event] initialize MediaPipeline error!

Following is the custom dts file that are using.

/dts-v1/;

#include "imx8mp-evk.dts"

&i2c3 {

clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";

/delete-node/ov5640_mipi@3c;

pca9849: pca9849@71 {
compatible = "nxp,pca9849";
reg = <0x71>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
powerdown-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
reset = <&gpio3 19 GPIO_ACTIVE_HIGH>;

i2c_0: i2c_0@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
status = "okay";

imx219_0: imx219_0@10 {
compatible = "sony,imx219";
reg = <0x10>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_csi0_pwn>, <&pinctrl_csi0_rst>, <&pinctrl_csi_mclk>;
clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
clock-names = "xclk";
assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
assigned-clock-rates = <24000000>;
csi_id = <0>;
pwdn-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
mclk = <24000000>;
mclk_source = <0>;
mipi_csi;
status = "okay";

port {
imx219_mipi_ep_0: endpoint {
remote-endpoint = <&mipi_csi_ep_0>;
data-lanes = <1 2>;
clock-lanes = <0>;
clock-noncontinuous;
max-pixel-frequency = /bits/ 64 <266000000>;
};
};
};
};
/*i2c_1: i2c_1@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
status = "okay";

imx219_1: imx219_1@10 {
compatible = "sony,imx219";
reg = <0x10>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_csi0_pwn>, <&pinctrl_csi0_rst>, <&pinctrl_csi_mclk>;
clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
clock-names = "xclk";
assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
assigned-clock-rates = <24000000>;
csi_id = <0>;
mclk = <24000000>;
mclk_source = <0>;
mipi_csi;
status = "okay";

port {
imx219_mipi_ep_1: endpoint {
remote-endpoint = <&mipi_csi_ep_1>;
data-lanes = <1 2>;
clock-noncontinuous;
clock-lanes = <0>;
max-pixel-frequency = /bits/ 64 <500000000>;
max-data-rate = /bits/ 64 <912000000>;
link-frequencies = /bits/ 64 <456000000>;
};
};
};
};*/
i2c_2: i2c_2@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
status = "okay";

imx219_2: imx219_2@10 {
compatible = "sony,imx219";
reg = <0x10>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_csi0_pwn>, <&pinctrl_csi0_rst>, <&pinctrl_csi_mclk>;
clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
clock-names = "xclk";
assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
assigned-clock-rates = <24000000>;
csi_id = <1>;
pwdn-gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>;
mclk = <24000000>;
mclk_source = <0>;
mipi_csi;
status = "okay";

port {
imx219_mipi_ep_1: endpoint {
remote-endpoint = <&mipi_csi_ep_1>;
data-lanes = <1 2>;
clock-lanes = <0>;
clock-noncontinuous;
max-pixel-frequency = /bits/ 64 <266000000>;
max-data-rate = /bits/ 64 <912000000>;
link-frequencies = /bits/ 64 <750000000>;

};
};
};
};
/*i2c_3: i2c_3@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
status = "okay";

imx219_3: imx219_3@10 {
compatible = "sony,imx219";
reg = <0x10>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_csi0_pwn>, <&pinctrl_csi0_rst>, <&pinctrl_csi_mclk>;
clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
clock-names = "xclk";
assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
assigned-clock-rates = <24000000>;
csi_id = <1>;
pwdn-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
mclk = <24000000>;
mclk_source = <0>;
mipi_csi;
status = "okay";

port {
imx219_mipi_ep_3: endpoint {
remote-endpoint = <&mipi_csi_ep_3>;
data-lanes = <1 2>;
clock-lanes = <0>;
};
};
};
};*/
};

};

&cameradev {
status = "okay";
};

&isi_0 {
status = "disabled";
};

&isi_1 {
status = "disabled";
};

&isp_0 {
status = "okay";
};

&isp_1 {
status = "okay";
};

&dewarp {
status = "okay";
};

&mipi_csi_0 {

status = "okay";
clock-frequency = <266000000>;
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>;
assigned-clock-rates = <266000000>;

port@0 {
reg = <0>;
mipi_csi_ep_0: endpoint {
remote-endpoint = <&imx219_mipi_ep_0>;
data-lanes = <2>;
csis-hs-settle = <16>;
csis-clk-settle = <2>;
csis-wclk;
};
};

};

&i2c2 {
/delete-node/ov5640_mipi@3c;
};

&mipi_csi_1 {
status = "okay";

port@1 {
reg = <1>;
mipi_csi_ep_1: endpoint {
remote-endpoint = <&imx219_mipi_ep_1>;
data-lanes = <2>;
csis-hs-settle = <16>;
csis-clk-settle = <2>;
csis-wclk;
};
};
};

Attaching the dtsi file for reference.

Does it require any change to enable the second MIPI CSI interface?

Any help is appreciated.

Thanks in advance!

Regards

Charles

Re: Integrating dual MIPI CSI interface in iMX8MP Processor

joanxie — Fri, 23 Sep 2022 08:39:49 GMT

how do you connect dual camera to the imx8mp board? could you share the connection of your application?

Re: Integrating dual MIPI CSI interface in iMX8MP Processor

Amal_Antony3331 — Fri, 23 Sep 2022 10:54:45 GMT

Hi @joanxie

I have a requirement to connect a total of 4 cameras to CSI0 and CSI1. ie 2 channels to CSI0 and 2 channels to CSI1. I'm planning to achieve it through an i2c MUX and 2 MIPI switches.

Now I'm able to stream all the channels separately. ( this is achieved by commenting out all other interfaces in dts file). Now I have to enable all the channels in the dts file. How can I achieve this?

Attaching the dts file for reference.(its extension is changed as dts file cannot be uploaded)

Regards

Charles

Re: Integrating dual MIPI CSI interface in iMX8MP Processor

joanxie — Tue, 27 Sep 2022 04:43:51 GMT

could you share the logfile? and what bsp version do you use?

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Integrating dual MIPI CSI interface in iMX8MP Processor

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