topic i.MX 8M plus audio PLL > MCLK vs TXC in i.MX Processors

i.MX 8M plus audio PLL > MCLK vs TXC

dav1 — Mon, 19 Sep 2022 14:21:55 GMT

I'm struggling to find in the documentation what constraints there are to tie any of the Audio PLL's 1/2 to a SAI.TXC pin or a MCLK pin.

in the charts it looks like it is only available to mclk3 (hope not), does this mean I have to route it back physically on the board?

riteshmpatel — Mon, 26 Sep 2022 09:47:48 GMT

Hope you are doing well.
Please accept my apologies for delay in response.

If I understood correctly, then I understood that you want to know which Audio PLL is routed to SAIx_TXC and SAIx_MCLK. Please confirm.

In addition to this, could you please let me know which chart are you referring to?

Thanks & Regards,
Ritesh M Patel

dav1 — Mon, 26 Sep 2022 13:59:22 GMT

I want to know

1. can I internally connect audio pll 1 or 2 to any SAI*_MCLK?

2. can I internally connect audio pll 1 or 2 to any SAI*_TXC?

riteshmpatel — Tue, 27 Sep 2022 09:46:32 GMT

Kindly refer to Section 14.1.1.1 SAI Master Clock Inputs/Outputs for internal clock root description in IMX8MPRM document.

For clock source selection, please refer to Slice Index 75 in Table 5-1. Clock Root Table in IMX8MPRM document.

Thanks & Regards,
Ritesh M Patel