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    <title>i.MX ProcessorsのトピックRe: IMX PCIe port link down</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX-PCIe-port-link-down/m-p/238799#M19507</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, 明时:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; I just copy the name from mail, sorry. :smileygrin:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; You mention you're using development board, so could you also provide some information about your pcie device, board model and SDK version? for example, I use freescale's development borad - "SabreSD", and using SDK3.0.35_4.1.0&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; You also mention your coworker using same code, same device but didn't met this issue. Did you two change the device and see if you got a broken board/pcie device?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; In kernel/arch/arm/mach-mx6/pcie.c, "link up failed" error occur while imx_pcie_link_up() execute, you can take a look.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Wally&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 07 Apr 2016 07:31:21 GMT</pubDate>
    <dc:creator>wallyyeh</dc:creator>
    <dc:date>2016-04-07T07:31:21Z</dc:date>
    <item>
      <title>IMX PCIe port link down</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX-PCIe-port-link-down/m-p/238794#M19502</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi all,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am testing iwl4965 on mini pcie port of MX6Q SABRESD. After linux boot, I can see noting using 'lspci',and I find these messages during boot up:&lt;/P&gt;&lt;P&gt;...&lt;/P&gt;&lt;P&gt;...&lt;/P&gt;&lt;P&gt;iMX6 PCIe PCIe RC mode imx_pcie_pltfm_probe entering.&lt;/P&gt;&lt;P&gt;PCIE: imx_pcie_pltfm_probe start link up.&lt;/P&gt;&lt;P&gt;link up failed, DB_R0:0x002f0200, DB_R1:0x08200000!&lt;/P&gt;&lt;P&gt;IMX PCIe port: link down!&lt;/P&gt;&lt;P&gt;IMX usb wakeup probe&lt;/P&gt;&lt;P&gt;...&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My BSP is  L3.0.35_4.1.0_130816 downloaded from freescale,and I add support of pcie in kernel:&lt;/P&gt;&lt;P&gt;System Type  ---&amp;gt;Freescale MXC Implementations  ---&amp;gt;[*] PCI Express support &lt;/P&gt;&lt;P&gt;Bus support  ---&amp;gt;  PCI Express support&lt;/P&gt;&lt;P&gt;Device Drivers  ---&amp;gt; Network device support ---&amp;gt;Wireless LAN ---&amp;gt; &amp;lt;*&amp;gt; Intel Wireless WiFi 4965AGN (iwl4965) &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Adding EC and RC support have no help.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Anyone knows the reason? Are there some places I need pay attention to?&lt;/P&gt;&lt;P&gt;Thanks in advance!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Xiaoqiang&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 17 Feb 2014 10:55:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX-PCIe-port-link-down/m-p/238794#M19502</guid>
      <dc:creator>xiaoqiangyang</dc:creator>
      <dc:date>2014-02-17T10:55:43Z</dc:date>
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    <item>
      <title>Re: IMX PCIe port link down</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX-PCIe-port-link-down/m-p/238795#M19503</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;just a suggestion, do you reset your pcie device before you start your kernel?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I do reset in arch/arm/mach-mx6/board-mx6q_sabresd.c&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 19 Feb 2014 07:12:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX-PCIe-port-link-down/m-p/238795#M19503</guid>
      <dc:creator>wallyyeh</dc:creator>
      <dc:date>2014-02-19T07:12:13Z</dc:date>
    </item>
    <item>
      <title>Re: IMX PCIe port link down</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX-PCIe-port-link-down/m-p/238796#M19504</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #666666; font-family: Tahoma, Arial, 宋体, 'Malgun Gothic'; font-size: 12px; font-style: normal; font-weight: normal; text-align: justify; text-indent: 0px; background-color: rgba(255, 255, 255, 0.8);"&gt;Can you tell me, how do you solve this problem?&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Apr 2016 02:34:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX-PCIe-port-link-down/m-p/238796#M19504</guid>
      <dc:creator>minshi</dc:creator>
      <dc:date>2016-04-07T02:34:37Z</dc:date>
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    <item>
      <title>Re: IMX PCIe port link down</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX-PCIe-port-link-down/m-p/238797#M19505</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I don't even know how to call you, sir. Your name become just a bunch of utf8 codes I guess.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;first, this question is not solved since the author never change this question's status.&lt;/P&gt;&lt;P&gt;but if you just want to know "how to reset PCIE device", here's the simple description:&lt;/P&gt;&lt;P&gt;every pcie device must have an reset pin, and most HW design will attach a GPIO on it, what you need is just toggle the GPIO. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;hope this will be help.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Apr 2016 03:55:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX-PCIe-port-link-down/m-p/238797#M19505</guid>
      <dc:creator>wallyyeh</dc:creator>
      <dc:date>2016-04-07T03:55:50Z</dc:date>
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    <item>
      <title>Re: IMX PCIe port link down</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX-PCIe-port-link-down/m-p/238798#M19506</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #666666; font-family: Tahoma, Arial, 宋体, 'Malgun Gothic'; font-size: 12px; font-style: normal; font-weight: normal; text-align: justify; text-indent: 0px; background-color: rgba(255, 255, 255, 0.8);"&gt;Thank you very much&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #666666; font-family: Tahoma, Arial, 宋体, 'Malgun Gothic'; font-size: 12px; font-style: normal; font-weight: normal; text-align: justify; text-indent: 0px; background-color: rgba(255, 255, 255, 0.8);"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;SPAN style="color: #666666; font-family: Tahoma, Arial, 宋体, 'Malgun Gothic'; font-size: 12px; font-style: normal; font-weight: normal; text-align: justify; text-indent: 0px; background-color: rgba(255, 255, 255, 0.8);"&gt;But I'm a beginner，&lt;SPAN style="color: #666666; font-family: Tahoma, Arial, 宋体, 'Malgun Gothic'; font-size: 12px; font-style: normal; font-weight: normal; text-align: justify; text-indent: 0px; background-color: rgba(255, 255, 255, 0.8);"&gt;&lt;SPAN class="Apple-converted-space"&gt; i &lt;/SPAN&gt;still want to ask:&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: rgba(255, 255, 255, 0.8); color: #666666; text-indent: 0px; font-weight: normal; font-size: 12px; font-family: Tahoma, Arial, 宋体, 'Malgun Gothic'; font-style: normal; text-align: justify;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; link up failed,DB....&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: rgba(255, 255, 255, 0.8); color: #666666; text-indent: 0px; font-weight: normal; font-size: 12px; font-family: Tahoma, Arial, 宋体, 'Malgun Gothic'; font-style: normal; text-align: justify;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; what should I do ?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: rgba(255, 255, 255, 0.8); color: #666666; text-indent: 0px; font-weight: normal; font-size: 12px; font-family: Tahoma, Arial, 宋体, 'Malgun Gothic'; font-style: normal; text-align: justify;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; The JTAG1 is the reset pin?&lt;SPAN style="color: #666666; font-family: Tahoma, Arial, 宋体, 'Malgun Gothic'; font-size: 12px; font-style: normal; font-weight: normal; text-align: justify; text-indent: 0px; background-color: rgba(255, 255, 255, 0.8);"&gt;If this is the case,&lt;SPAN style="color: #666666; font-family: Tahoma, Arial, 宋体, 'Malgun Gothic'; font-size: 12px; font-style: normal; font-weight: normal; text-align: justify; text-indent: 0px; background-color: rgba(255, 255, 255, 0.8);"&gt;Our development board did not lead to the pin.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: rgba(255, 255, 255, 0.8); color: #666666; text-indent: 0px; font-weight: normal; font-size: 12px; font-family: Tahoma, Arial, 宋体, 'Malgun Gothic'; font-style: normal; text-align: justify;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; But my colleague has link up sucess,u&lt;STRONG style="background-color: rgba(255, 255, 255, 0.8); color: #666666; text-indent: 0px; font-weight: normal; font-size: 12px; font-family: Tahoma, Arial, 宋体, 'Malgun Gothic'; font-style: normal; text-align: justify;"&gt;se the same hardware.&lt;SPAN style="color: #666666; font-family: Tahoma, Arial, 宋体, 'Malgun Gothic'; font-size: 12px; font-style: normal; font-weight: normal; text-align: justify; text-indent: 0px; background-color: rgba(255, 255, 255, 0.8);"&gt;But he had other problems.&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Apr 2016 06:17:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX-PCIe-port-link-down/m-p/238798#M19506</guid>
      <dc:creator>minshi</dc:creator>
      <dc:date>2016-04-07T06:17:04Z</dc:date>
    </item>
    <item>
      <title>Re: IMX PCIe port link down</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX-PCIe-port-link-down/m-p/238799#M19507</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, 明时:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; I just copy the name from mail, sorry. :smileygrin:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; You mention you're using development board, so could you also provide some information about your pcie device, board model and SDK version? for example, I use freescale's development borad - "SabreSD", and using SDK3.0.35_4.1.0&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; You also mention your coworker using same code, same device but didn't met this issue. Did you two change the device and see if you got a broken board/pcie device?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; In kernel/arch/arm/mach-mx6/pcie.c, "link up failed" error occur while imx_pcie_link_up() execute, you can take a look.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Wally&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Apr 2016 07:31:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX-PCIe-port-link-down/m-p/238799#M19507</guid>
      <dc:creator>wallyyeh</dc:creator>
      <dc:date>2016-04-07T07:31:21Z</dc:date>
    </item>
    <item>
      <title>Re: IMX PCIe port link down</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX-PCIe-port-link-down/m-p/238800#M19508</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,Wally:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; First,very thanks for you.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Then,I use the development borad which modelled on the freescale's development borad - "SabreSD", and using SDK3.0.35_4.1.0.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; We only have one development board,mycoworker is debugged a year ago.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; I also read that code, but I didn't find any problem.&lt;/P&gt;&lt;P&gt;how can I do?&lt;/P&gt;&lt;P&gt;明时&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Apr 2016 08:07:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX-PCIe-port-link-down/m-p/238800#M19508</guid>
      <dc:creator>minshi</dc:creator>
      <dc:date>2016-04-07T08:07:29Z</dc:date>
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    <item>
      <title>Re: IMX PCIe port link down</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX-PCIe-port-link-down/m-p/238801#M19509</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear &lt;SPAN style="color: #51626f; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif;"&gt;明时:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif;"&gt;&amp;nbsp;&amp;nbsp; OK, if you using sabreSD, the PCIE reset pin is GPIO17(which is group 7, pin 12).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif;"&gt;At kernel/arch/arm/mach-mx6/board-mx6q_sabresd.c, you will find the pcie reset pin's define:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;TABLE&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD&gt;#define SABRESD_PCIE_RST_B_REVB&lt;/TD&gt;&lt;TD&gt;IMX_GPIO_NR(7, 12)&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Since I'm not pcie expert, my only suggestion is toggle this GPIO while u-boot, and if this trick doesn't work, you may need open a tech support request from NXP.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Wally&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Apr 2016 08:18:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX-PCIe-port-link-down/m-p/238801#M19509</guid>
      <dc:creator>wallyyeh</dc:creator>
      <dc:date>2016-04-07T08:18:36Z</dc:date>
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    <item>
      <title>Re: IMX PCIe port link down</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX-PCIe-port-link-down/m-p/238802#M19510</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Wally:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Can you give me a schematic diagram?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; In schematic diagram,i can not find the &lt;SPAN style="color: #51626f; font-family: Arial;"&gt;GPIO17.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; font-family: Arial;"&gt;Best wishes。&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; font-family: Arial;"&gt;明时&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Apr 2016 08:52:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX-PCIe-port-link-down/m-p/238802#M19510</guid>
      <dc:creator>minshi</dc:creator>
      <dc:date>2016-04-07T08:52:58Z</dc:date>
    </item>
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      <title>Re: IMX PCIe port link down</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX-PCIe-port-link-down/m-p/238803#M19511</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear 明时:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Sorry, I don't have it either.I usually get informed by asking our HW mates or Freescale FAE.&lt;/P&gt;&lt;P&gt;If you can't find it on the NXP website, just ask the FAE for it.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Wally&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 08 Apr 2016 01:56:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX-PCIe-port-link-down/m-p/238803#M19511</guid>
      <dc:creator>wallyyeh</dc:creator>
      <dc:date>2016-04-08T01:56:39Z</dc:date>
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