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    <title>i.MX Processors中的主题 Re: How to control the USB_OTG_PWR and the USB_H1_PWR of i.MX6</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/How-to-control-the-USB-OTG-PWR-and-the-USB-H1-PWR-of-i-MX6/m-p/238751#M19487</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;BR /&gt;Hi, Yuuki&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;consulted with BSP team.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;they treated these two signals as normal GPIO in linux till now.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 23 Jan 2014 07:00:25 GMT</pubDate>
    <dc:creator>alfred_liu</dc:creator>
    <dc:date>2014-01-23T07:00:25Z</dc:date>
    <item>
      <title>How to control the USB_OTG_PWR and the USB_H1_PWR of i.MX6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-control-the-USB-OTG-PWR-and-the-USB-H1-PWR-of-i-MX6/m-p/238749#M19485</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I understand that USB_OTG_PWR and USB_H1_PWR are the signals which control each VBUS of USB OTG and USB Host1.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;These signals are assigned to the following pins. &lt;/P&gt;&lt;P&gt;- USB_OTG_PWR : EIM_D22(ALT4) or KEY_ROW4(ALT2)&lt;BR /&gt;- USB_H1_PWR : EIM_D31(ALT6) or GPIO_0(ALT6)&lt;BR /&gt;"To control PMIC to supply VBUS voltage"&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;However, I cannot find the register bit filde for controlling these signals. &lt;BR /&gt;Could you teach register bit filde which controls these signals? &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jan 2014 10:48:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-control-the-USB-OTG-PWR-and-the-USB-H1-PWR-of-i-MX6/m-p/238749#M19485</guid>
      <dc:creator>yuuki</dc:creator>
      <dc:date>2014-01-16T10:48:23Z</dc:date>
    </item>
    <item>
      <title>Re: How to control the USB_OTG_PWR and the USB_H1_PWR of i.MX6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-control-the-USB-OTG-PWR-and-the-USB-H1-PWR-of-i-MX6/m-p/238750#M19486</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, YUuki&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;these two signals are just alike normal GPIO, no special register for USB_OTG_PWR and USB_H1_PWR.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 23 Jan 2014 06:46:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-control-the-USB-OTG-PWR-and-the-USB-H1-PWR-of-i-MX6/m-p/238750#M19486</guid>
      <dc:creator>alfred_liu</dc:creator>
      <dc:date>2014-01-23T06:46:43Z</dc:date>
    </item>
    <item>
      <title>Re: How to control the USB_OTG_PWR and the USB_H1_PWR of i.MX6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-control-the-USB-OTG-PWR-and-the-USB-H1-PWR-of-i-MX6/m-p/238751#M19487</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;BR /&gt;Hi, Yuuki&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;consulted with BSP team.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;they treated these two signals as normal GPIO in linux till now.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 23 Jan 2014 07:00:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-control-the-USB-OTG-PWR-and-the-USB-H1-PWR-of-i-MX6/m-p/238751#M19487</guid>
      <dc:creator>alfred_liu</dc:creator>
      <dc:date>2014-01-23T07:00:25Z</dc:date>
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