How to run M7 code from both TCM and DDR?

jpsk — Wed, 17 Aug 2022 17:48:32 GMT

Hi,

I have a simple program running on the M7 (i.MX8 Nano) which triggers a GPIO interrupt to unblock the SPI read when a "data ready" signal is received from the ADC ~every 43us.

When I run this code in TCM, timing looks great and everything works beautifully.

Note: "ADC CS" is a separate GPIO pin that complements the native SPI Chip Select to select one of multiple SPI slaves in the SPI bus.

When I run the code from DDR, the ISR was not serviced timely and the entire routine to retrieve the SPI data takes about 10 times longer! Is there a way to speed up the code running from the DDR?

How to setup the code to run from both TCM and DDR?

Due to the size of the TCM (128K each for Instructions and Data), running our entire program on the TCM is not a viable solution, I read that it is possible to run the most time critical routines (ISR, real time tasks) from the TCM and the rest from the DDR. Is there an example somewhere that I can refer to see how this is done?

Any pointers on how to address the execution speed limitation is greatly appreciated. Thanks!

Re: How to run M7 code from both TCM and DDR?

Dhruvit — Thu, 01 Sep 2022 09:36:17 GMT

Hi @jpsk,

[Q] Is there a way to speed up the code running from the DDR?

[A]

The biggest factor is cache! You must enable the M4 cache when running from DDR.

That will help you speed up the code running.

Best Regards,
Dhruvit.

topic Re: How to run M7 code from both TCM and DDR? in i.MX Processors

How to run M7 code from both TCM and DDR?

Re: How to run M7 code from both TCM and DDR?