<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic how to enable pcie0? in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/how-to-enable-pcie0/m-p/1506424#M193885</link>
    <description>&lt;P&gt;HI:&lt;/P&gt;&lt;P&gt;I am currently porting bsp5.10.72, but I always get pcie0 errors. However, it works well in bsp5.4.3.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Eddy1_0-1660616337775.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/190251i58CD45868A62A07C/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Eddy1_0-1660616337775.png" alt="Eddy1_0-1660616337775.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;Eddy1_0-1660616337775.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Could you give me some suggestions?Refer to the official evaluation board im8mm-evk to modify the device tree&lt;/P&gt;&lt;P&gt;&amp;amp;pcie0{&lt;BR /&gt;pinctrl-names = "default";&lt;BR /&gt;pinctrl-0 = &amp;lt;&amp;amp;pinctrl_pcie0&amp;gt;;&lt;BR /&gt;disable-gpio = &amp;lt;&amp;amp;gpio2 20 GPIO_ACTIVE_LOW&amp;gt;;&lt;BR /&gt;reset-gpio = &amp;lt;&amp;amp;gpio4 22 GPIO_ACTIVE_LOW&amp;gt;;&lt;BR /&gt;clocks = &amp;lt;&amp;amp;clk IMX8MM_CLK_PCIE1_ROOT&amp;gt;,&lt;BR /&gt;&amp;lt;&amp;amp;clk IMX8MM_CLK_PCIE1_AUX&amp;gt;,&lt;BR /&gt;&amp;lt;&amp;amp;clk IMX8MM_CLK_PCIE1_PHY&amp;gt;,&lt;BR /&gt;&amp;lt;&amp;amp;pcie0_refclk&amp;gt;;&lt;BR /&gt;clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";&lt;BR /&gt;assigned-clocks = &amp;lt;&amp;amp;clk IMX8MM_CLK_PCIE1_AUX&amp;gt;,&lt;BR /&gt;&amp;lt;&amp;amp;clk IMX8MM_CLK_PCIE1_PHY&amp;gt;,&lt;BR /&gt;&amp;lt;&amp;amp;clk IMX8MM_CLK_PCIE1_CTRL&amp;gt;;&lt;BR /&gt;assigned-clock-rates = &amp;lt;10000000&amp;gt;, &amp;lt;100000000&amp;gt;, &amp;lt;250000000&amp;gt;;&lt;BR /&gt;assigned-clock-parents = &amp;lt;&amp;amp;clk IMX8MM_SYS_PLL2_50M&amp;gt;,&lt;BR /&gt;&amp;lt;&amp;amp;clk IMX8MM_SYS_PLL2_100M&amp;gt;,&lt;BR /&gt;&amp;lt;&amp;amp;clk IMX8MM_SYS_PLL2_250M&amp;gt;;&lt;BR /&gt;ext_osc = &amp;lt;1&amp;gt;;&lt;BR /&gt;status = "okay";&lt;BR /&gt;};&lt;/P&gt;</description>
    <pubDate>Tue, 16 Aug 2022 02:22:06 GMT</pubDate>
    <dc:creator>Eddy1</dc:creator>
    <dc:date>2022-08-16T02:22:06Z</dc:date>
    <item>
      <title>how to enable pcie0?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/how-to-enable-pcie0/m-p/1506424#M193885</link>
      <description>&lt;P&gt;HI:&lt;/P&gt;&lt;P&gt;I am currently porting bsp5.10.72, but I always get pcie0 errors. However, it works well in bsp5.4.3.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Eddy1_0-1660616337775.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/190251i58CD45868A62A07C/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Eddy1_0-1660616337775.png" alt="Eddy1_0-1660616337775.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;Eddy1_0-1660616337775.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Could you give me some suggestions?Refer to the official evaluation board im8mm-evk to modify the device tree&lt;/P&gt;&lt;P&gt;&amp;amp;pcie0{&lt;BR /&gt;pinctrl-names = "default";&lt;BR /&gt;pinctrl-0 = &amp;lt;&amp;amp;pinctrl_pcie0&amp;gt;;&lt;BR /&gt;disable-gpio = &amp;lt;&amp;amp;gpio2 20 GPIO_ACTIVE_LOW&amp;gt;;&lt;BR /&gt;reset-gpio = &amp;lt;&amp;amp;gpio4 22 GPIO_ACTIVE_LOW&amp;gt;;&lt;BR /&gt;clocks = &amp;lt;&amp;amp;clk IMX8MM_CLK_PCIE1_ROOT&amp;gt;,&lt;BR /&gt;&amp;lt;&amp;amp;clk IMX8MM_CLK_PCIE1_AUX&amp;gt;,&lt;BR /&gt;&amp;lt;&amp;amp;clk IMX8MM_CLK_PCIE1_PHY&amp;gt;,&lt;BR /&gt;&amp;lt;&amp;amp;pcie0_refclk&amp;gt;;&lt;BR /&gt;clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";&lt;BR /&gt;assigned-clocks = &amp;lt;&amp;amp;clk IMX8MM_CLK_PCIE1_AUX&amp;gt;,&lt;BR /&gt;&amp;lt;&amp;amp;clk IMX8MM_CLK_PCIE1_PHY&amp;gt;,&lt;BR /&gt;&amp;lt;&amp;amp;clk IMX8MM_CLK_PCIE1_CTRL&amp;gt;;&lt;BR /&gt;assigned-clock-rates = &amp;lt;10000000&amp;gt;, &amp;lt;100000000&amp;gt;, &amp;lt;250000000&amp;gt;;&lt;BR /&gt;assigned-clock-parents = &amp;lt;&amp;amp;clk IMX8MM_SYS_PLL2_50M&amp;gt;,&lt;BR /&gt;&amp;lt;&amp;amp;clk IMX8MM_SYS_PLL2_100M&amp;gt;,&lt;BR /&gt;&amp;lt;&amp;amp;clk IMX8MM_SYS_PLL2_250M&amp;gt;;&lt;BR /&gt;ext_osc = &amp;lt;1&amp;gt;;&lt;BR /&gt;status = "okay";&lt;BR /&gt;};&lt;/P&gt;</description>
      <pubDate>Tue, 16 Aug 2022 02:22:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/how-to-enable-pcie0/m-p/1506424#M193885</guid>
      <dc:creator>Eddy1</dc:creator>
      <dc:date>2022-08-16T02:22:06Z</dc:date>
    </item>
    <item>
      <title>Re: how to enable pcie0?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/how-to-enable-pcie0/m-p/1512340#M194324</link>
      <description>&lt;P&gt;The reset controller needs to be enabled as follows:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Eddy1_0-1661514385419.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/191429iB28B3A05E9ACE9B8/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Eddy1_0-1661514385419.png" alt="Eddy1_0-1661514385419.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;Eddy1_0-1661514385419.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 26 Aug 2022 11:47:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/how-to-enable-pcie0/m-p/1512340#M194324</guid>
      <dc:creator>Eddy1</dc:creator>
      <dc:date>2022-08-26T11:47:00Z</dc:date>
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  </channel>
</rss>

