<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX ProcessorsのトピックRe: ASIC revision and version</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/ASIC-revision-and-version/m-p/238168#M19359</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;DIGPROG register will contain the chip type info. Bits 23-16 will be:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;0x60 - i.MX 6SoloLite&lt;/LI&gt;&lt;LI&gt;0x61 - i.MX 6Solo/DualLite&lt;/LI&gt;&lt;LI&gt;0x63 - I.mx 6DualQuad&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Specific number of cores and silicon revision can be found from NUM_CORES and SI_REV fuses.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 02 Dec 2013 11:30:06 GMT</pubDate>
    <dc:creator>VladanJovanovic</dc:creator>
    <dc:date>2013-12-02T11:30:06Z</dc:date>
    <item>
      <title>ASIC revision and version</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ASIC-revision-and-version/m-p/238167#M19358</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I try to determine the ASIC revision and version. Normally this are well defined within the specification of the ASIC and directly accessible via the ARM CPU, but not for IMX6. According to the spec this register are called JTAG ID. So the question is which command I need to read this register and if there are another way of getting the revision and version info?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 02 Dec 2013 10:28:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ASIC-revision-and-version/m-p/238167#M19358</guid>
      <dc:creator>mrlantz</dc:creator>
      <dc:date>2013-12-02T10:28:14Z</dc:date>
    </item>
    <item>
      <title>Re: ASIC revision and version</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ASIC-revision-and-version/m-p/238168#M19359</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;DIGPROG register will contain the chip type info. Bits 23-16 will be:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;0x60 - i.MX 6SoloLite&lt;/LI&gt;&lt;LI&gt;0x61 - i.MX 6Solo/DualLite&lt;/LI&gt;&lt;LI&gt;0x63 - I.mx 6DualQuad&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Specific number of cores and silicon revision can be found from NUM_CORES and SI_REV fuses.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 02 Dec 2013 11:30:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ASIC-revision-and-version/m-p/238168#M19359</guid>
      <dc:creator>VladanJovanovic</dc:creator>
      <dc:date>2013-12-02T11:30:06Z</dc:date>
    </item>
    <item>
      <title>Re: ASIC revision and version</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ASIC-revision-and-version/m-p/238169#M19360</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Also bit field SOC_VERSION of IOMUXC_GPR4 register may be in addition used.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 02 Dec 2013 11:41:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ASIC-revision-and-version/m-p/238169#M19360</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2013-12-02T11:41:47Z</dc:date>
    </item>
    <item>
      <title>Re: ASIC revision and version</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ASIC-revision-and-version/m-p/238170#M19361</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I guess you want to determine the mx6 silicon revision.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please check how we do that in U-boot (earch for get_cpu_rev(void) ) function at:&lt;/P&gt;&lt;P&gt;&lt;A href="http://git.denx.de/?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/mx6/soc.c;h=a3902962b5249c4ebf9ef66df991d42b69e007f8;hb=HEAD" title="http://git.denx.de/?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/mx6/soc.c;h=a3902962b5249c4ebf9ef66df991d42b69e007f8;hb=HEAD"&gt;http://git.denx.de/?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/mx6/soc.c;h=a3902962b5249c4ebf9ef66df991d42b69e007f8;hb=HEAD&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Fabio Estevam&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 02 Dec 2013 12:42:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ASIC-revision-and-version/m-p/238170#M19361</guid>
      <dc:creator>fabio_estevam</dc:creator>
      <dc:date>2013-12-02T12:42:53Z</dc:date>
    </item>
  </channel>
</rss>

