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    <title>i.MX ProcessorsのトピックMemory edit leads to debug break at 0xdeadbeee</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Memory-edit-leads-to-debug-break-at-0xdeadbeee/m-p/1494896#M192976</link>
    <description>&lt;P&gt;Using MCUXpresso memory map editor editing memory map for "Hello World" from EVK RT1024-SDK&amp;nbsp; results in this message when executing Debug:&lt;/P&gt;&lt;P&gt;"Break at address "0xdeadbeee" with no debug information available, or outside of program code."&lt;/P&gt;&lt;P&gt;The memory change is size of SRAM_OC changed from 0x20000 to 0x10000 and SRAM_ITC size changed from 0x10000 to 0x20000. So 0x10000KB is moved from SRAM_OC to SRAM_ITC.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="petrama_0-1658759721461.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/187725i0ACB149FE9D7B41B/image-size/medium?v=v2&amp;amp;px=400" role="button" title="petrama_0-1658759721461.png" alt="petrama_0-1658759721461.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;(Later note:&lt;EM&gt;I think an error here is that BOARD_SDRAM and NCACHE:REGION should be placed last, so that SRAM_DTC is the first RAM block.)&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;What am I missing - is there someting else I need to do? (all breakpoints have been removed)&lt;/P&gt;&lt;P&gt;In the editor all that is required is to change the memory block sizes by portions of 32KB - no other fields?&lt;/P&gt;&lt;P&gt;What purpose does the checkbox "Preserve memory configuration" have?&lt;/P&gt;</description>
    <pubDate>Tue, 26 Jul 2022 10:23:35 GMT</pubDate>
    <dc:creator>petrama</dc:creator>
    <dc:date>2022-07-26T10:23:35Z</dc:date>
    <item>
      <title>Memory edit leads to debug break at 0xdeadbeee</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Memory-edit-leads-to-debug-break-at-0xdeadbeee/m-p/1494896#M192976</link>
      <description>&lt;P&gt;Using MCUXpresso memory map editor editing memory map for "Hello World" from EVK RT1024-SDK&amp;nbsp; results in this message when executing Debug:&lt;/P&gt;&lt;P&gt;"Break at address "0xdeadbeee" with no debug information available, or outside of program code."&lt;/P&gt;&lt;P&gt;The memory change is size of SRAM_OC changed from 0x20000 to 0x10000 and SRAM_ITC size changed from 0x10000 to 0x20000. So 0x10000KB is moved from SRAM_OC to SRAM_ITC.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="petrama_0-1658759721461.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/187725i0ACB149FE9D7B41B/image-size/medium?v=v2&amp;amp;px=400" role="button" title="petrama_0-1658759721461.png" alt="petrama_0-1658759721461.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;(Later note:&lt;EM&gt;I think an error here is that BOARD_SDRAM and NCACHE:REGION should be placed last, so that SRAM_DTC is the first RAM block.)&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;What am I missing - is there someting else I need to do? (all breakpoints have been removed)&lt;/P&gt;&lt;P&gt;In the editor all that is required is to change the memory block sizes by portions of 32KB - no other fields?&lt;/P&gt;&lt;P&gt;What purpose does the checkbox "Preserve memory configuration" have?&lt;/P&gt;</description>
      <pubDate>Tue, 26 Jul 2022 10:23:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Memory-edit-leads-to-debug-break-at-0xdeadbeee/m-p/1494896#M192976</guid>
      <dc:creator>petrama</dc:creator>
      <dc:date>2022-07-26T10:23:35Z</dc:date>
    </item>
    <item>
      <title>Re: Memory edit leads to debug break at 0xdeadbeee</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Memory-edit-leads-to-debug-break-at-0xdeadbeee/m-p/1495439#M193033</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/189915"&gt;@petrama&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; Please check this application note at first:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com.cn/docs/en/application-note/AN12077.pdf" target="_blank"&gt;https://www.nxp.com.cn/docs/en/application-note/AN12077.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="kerryzhou_0-1658825102597.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/187840iD3F6836490BA1F92/image-size/medium?v=v2&amp;amp;px=400" role="button" title="kerryzhou_0-1658825102597.png" alt="kerryzhou_0-1658825102597.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;You can see, the FlexRAM default&amp;nbsp; OCRAM is 128KB, DTCM is 64 KB , ITCM is 64KB.&lt;/P&gt;
&lt;P&gt;So, if you want to use larger ITCM to 128KB, OCRAM to 64KB, you need to do the flexRAM reconfiguration.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="kerryzhou_1-1658825249693.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/187841i9C4E7CEC082A3F08/image-size/medium?v=v2&amp;amp;px=400" role="button" title="kerryzhou_1-1658825249693.png" alt="kerryzhou_1-1658825249693.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Otherwise, it will have issues.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/Reallocating-the-FlexRAM/ta-p/1117649" target="_blank"&gt;https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/Reallocating-the-FlexRAM/ta-p/1117649&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;The above post for flexRAM reallocate also useful to you.&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;Kerry&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 26 Jul 2022 08:48:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Memory-edit-leads-to-debug-break-at-0xdeadbeee/m-p/1495439#M193033</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2022-07-26T08:48:18Z</dc:date>
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