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    <title>topic Re: Device Tree and GPIO controll in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Device-Tree-and-GPIO-controll/m-p/1493093#M192804</link>
    <description>&lt;P&gt;Thanks for the Link.&lt;BR /&gt;I found problem, The Controll Mux register for specific pins had incorrect values.&lt;BR /&gt;The pins was set for peripheral purpose instead of gpio purpose (MUX_MODE)&lt;/P&gt;</description>
    <pubDate>Thu, 21 Jul 2022 06:52:03 GMT</pubDate>
    <dc:creator>btarnowski</dc:creator>
    <dc:date>2022-07-21T06:52:03Z</dc:date>
    <item>
      <title>Device Tree and GPIO controll</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Device-Tree-and-GPIO-controll/m-p/1492412#M192764</link>
      <description>&lt;P&gt;Hi all. I can not get work gpio.&lt;/P&gt;&lt;P&gt;In my case this is not working, I do not see any change on the physical GPIO pin&lt;/P&gt;&lt;P&gt;echo 47 &amp;gt; /sys/class/gpio/export&lt;BR /&gt;echo out &amp;gt; /sys/class/gpio/gpio47/direction&lt;/P&gt;&lt;P&gt;echo 1 &amp;gt; /sys/class/gpio/gpio47/value&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Some additional details below. What can be wrong?&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="btarnowski_1-1658315003590.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/187266i91A1E0B3EF08E612/image-size/medium?v=v2&amp;amp;px=400" role="button" title="btarnowski_1-1658315003590.png" alt="btarnowski_1-1658315003590.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="btarnowski_0-1658313461842.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/187261iB85A8B1B3C7D2DC7/image-size/medium?v=v2&amp;amp;px=400" role="button" title="btarnowski_0-1658313461842.png" alt="btarnowski_0-1658313461842.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 20 Jul 2022 11:03:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Device-Tree-and-GPIO-controll/m-p/1492412#M192764</guid>
      <dc:creator>btarnowski</dc:creator>
      <dc:date>2022-07-20T11:03:52Z</dc:date>
    </item>
    <item>
      <title>Re: Device Tree and GPIO controll</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Device-Tree-and-GPIO-controll/m-p/1492478#M192766</link>
      <description>&lt;P&gt;The pictures are a bit of a mess to follow. Try reading this application note and see if it helps:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN5078.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/application-note/AN5078.pdf&lt;/A&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 20 Jul 2022 13:06:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Device-Tree-and-GPIO-controll/m-p/1492478#M192766</guid>
      <dc:creator>J_W</dc:creator>
      <dc:date>2022-07-20T13:06:54Z</dc:date>
    </item>
    <item>
      <title>Re: Device Tree and GPIO controll</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Device-Tree-and-GPIO-controll/m-p/1493093#M192804</link>
      <description>&lt;P&gt;Thanks for the Link.&lt;BR /&gt;I found problem, The Controll Mux register for specific pins had incorrect values.&lt;BR /&gt;The pins was set for peripheral purpose instead of gpio purpose (MUX_MODE)&lt;/P&gt;</description>
      <pubDate>Thu, 21 Jul 2022 06:52:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Device-Tree-and-GPIO-controll/m-p/1493093#M192804</guid>
      <dc:creator>btarnowski</dc:creator>
      <dc:date>2022-07-21T06:52:03Z</dc:date>
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