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    <title>i.MX ProcessorsのトピックRe: iMX6SX ethernet MAC clock timing delay</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/iMX6SX-ethernet-MAC-clock-timing-delay/m-p/1483391#M192113</link>
    <description>&lt;P&gt;Hi all,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I would appreciate a response to this question, thank you.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;regards,&lt;/P&gt;&lt;P&gt;msarwar&lt;/P&gt;</description>
    <pubDate>Fri, 01 Jul 2022 10:08:13 GMT</pubDate>
    <dc:creator>msarwar</dc:creator>
    <dc:date>2022-07-01T10:08:13Z</dc:date>
    <item>
      <title>iMX6SX ethernet MAC clock timing delay</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6SX-ethernet-MAC-clock-timing-delay/m-p/1469878#M191220</link>
      <description>&lt;P&gt;Hi guys,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Hope you're all well. I am planning to connect an sja1105E ethernet switch to an iMX6SX. In the SJA1105E datasheet it says an external delay of 1.5 - 2.0 nS is required between the host rgmii interface and the switch port that the host uses (6.2.3 of NXP SJA1105E datasheet).&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;In the reference manual of the iMX6SX, section 24.5.5 Ethernet Control Register, there are a couple of bits, RXC_DLY and TXC_DLY, which select delayed versions of the clock:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="msarwar_0-1654593009086.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/182420i944AF44102DF29BD/image-size/medium?v=v2&amp;amp;px=400" role="button" title="msarwar_0-1654593009086.png" alt="msarwar_0-1654593009086.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;So, my question is, does setting those bits fulfil the requirements of the delayed clocks required by the RGMII interface ? If so is there any example configuration I can check ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;If the answer is no, does that mean an external board delay is required ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;thanks,&lt;/P&gt;&lt;P&gt;Mahtab&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 07 Jun 2022 09:16:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6SX-ethernet-MAC-clock-timing-delay/m-p/1469878#M191220</guid>
      <dc:creator>msarwar</dc:creator>
      <dc:date>2022-06-07T09:16:27Z</dc:date>
    </item>
    <item>
      <title>Re: iMX6SX ethernet MAC clock timing delay</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6SX-ethernet-MAC-clock-timing-delay/m-p/1483391#M192113</link>
      <description>&lt;P&gt;Hi all,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I would appreciate a response to this question, thank you.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;regards,&lt;/P&gt;&lt;P&gt;msarwar&lt;/P&gt;</description>
      <pubDate>Fri, 01 Jul 2022 10:08:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6SX-ethernet-MAC-clock-timing-delay/m-p/1483391#M192113</guid>
      <dc:creator>msarwar</dc:creator>
      <dc:date>2022-07-01T10:08:13Z</dc:date>
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