https://community.nxp.com/t5/i-MX-Processors/Imx8-SCFW-entry-point-question/m-p/1477010#M191705 <P>Hello, <BR /><BR />Yes it has, you may refer to the reference manual chapter 5.9.4 High Level Container Format &amp; 5.9.4.3 How the SCU ROM Parses Offsets/Addresses in the Image Container <BR /><BR />Best regards, <BR />Aldo.</P> Tue, 21 Jun 2022 00:41:43 GMT AldoG 2022-06-21T00:41:43Z https://community.nxp.com/t5/i-MX-Processors/Imx8-SCFW-entry-point-question/m-p/1460037#M190533 <P>Quick question if anyone knows... Does the SCFW have the standard entry point in the firmware (scfw_tcm.bin) as any other Cortex-m4?&nbsp; This would be having the initial stack pointer address stored at 0x0 and the initial program counter at 0x4 of the binary.</P> Wed, 18 May 2022 13:05:33 GMT https://community.nxp.com/t5/i-MX-Processors/Imx8-SCFW-entry-point-question/m-p/1460037#M190533 bghiggins 2022-05-18T13:05:33Z https://community.nxp.com/t5/i-MX-Processors/Imx8-SCFW-entry-point-question/m-p/1477010#M191705 <P>Hello, <BR /><BR />Yes it has, you may refer to the reference manual chapter 5.9.4 High Level Container Format &amp; 5.9.4.3 How the SCU ROM Parses Offsets/Addresses in the Image Container <BR /><BR />Best regards, <BR />Aldo.</P> Tue, 21 Jun 2022 00:41:43 GMT https://community.nxp.com/t5/i-MX-Processors/Imx8-SCFW-entry-point-question/m-p/1477010#M191705 AldoG 2022-06-21T00:41:43Z