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    <title>topic Re: IMX8MM OP-TEE configuration issue in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MM-OP-TEE-configuration-issue/m-p/1474752#M191530</link>
    <description>&lt;P&gt;I'm sorry, I have no idea what the issue was or how I resolved it which is the problem with NXP support not sharing answers in public and just emailing them.&lt;/P&gt;&lt;P&gt;I did OPTEE to work on our IMX8MM boards and documented it here:&amp;nbsp;&lt;A href="http://trac.gateworks.com/wiki/venice/tee" target="_blank"&gt;http://trac.gateworks.com/wiki/venice/tee&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Wed, 15 Jun 2022 20:49:00 GMT</pubDate>
    <dc:creator>timharvey</dc:creator>
    <dc:date>2022-06-15T20:49:00Z</dc:date>
    <item>
      <title>IMX8MM OP-TEE configuration issue</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MM-OP-TEE-configuration-issue/m-p/1357429#M181738</link>
      <description>&lt;P&gt;Greetings,&lt;/P&gt;&lt;P&gt;I'm having an issue configuring OP-TEE for a custom IMX8MM board that has 1GiB of DRAM.&lt;/P&gt;&lt;P&gt;I'm building imx-atf with 'make PLAT=imx8mm SPD=optee bl31'.&lt;/P&gt;&lt;P&gt;As the default configuration for the mx8mmevk board is&amp;nbsp;CFG_UART_BASE?=UART2_BASE CFG_DDR_SIZE?=0x80000000 is apporpriate for 2GiB I'm overriding CFG_DDR_SIZE and&amp;nbsp;building imx-optee-os with 'ARCH=arm&amp;nbsp;CFG_DDR_SIZE=0x4000000 ./scripts/nxp_build.sh mx8mmevk'.&lt;/P&gt;&lt;P&gt;And I'm building U-Boot with 'ATF_LOAD_ADDR=0x920000 TEE_LOAD_ADDR=0x7e000000' as 0x7e000000 would seem appropriate for a 1GiB board based on core/arch/arm/plat-imx/conf.mk setting CFG_TZDRAM_START ?=&amp;nbsp;($(CFG_DRAM_BASE) - 0x02000000 + $(CFG_DDR_SIZE))&lt;/P&gt;&lt;P&gt;When I boot I'm getting a panic in TEE:&lt;/P&gt;&lt;P&gt;NOTICE: BL31: v2.4(release):lf-5.10.52-2.1.0-rc2-1-gf884ad7b0ba2&lt;BR /&gt;NOTICE: BL31: Built : 15:31:33, Oct 18 2021&lt;BR /&gt;E/TC:0 Panic 'issue in linear address space' at core/arch/arm/mm/core_mmu.c:2074&lt;BR /&gt;&amp;lt;check_pa_matches_va&amp;gt;&lt;BR /&gt;E/TC:0 TEE load address @ 0x7e000000&lt;BR /&gt;E/TC:0 Call stack:&lt;BR /&gt;E/TC:0 0x00000000be00be60&lt;/P&gt;&lt;P&gt;Any ideas?&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Tim&lt;/P&gt;</description>
      <pubDate>Mon, 18 Oct 2021 23:24:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MM-OP-TEE-configuration-issue/m-p/1357429#M181738</guid>
      <dc:creator>timharvey</dc:creator>
      <dc:date>2021-10-18T23:24:54Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MM OP-TEE configuration issue</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MM-OP-TEE-configuration-issue/m-p/1357682#M181754</link>
      <description>&lt;P&gt;Hi Tim&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;additional details were sent you via mail.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;</description>
      <pubDate>Tue, 19 Oct 2021 07:24:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MM-OP-TEE-configuration-issue/m-p/1357682#M181754</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2021-10-19T07:24:02Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MM OP-TEE configuration issue</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MM-OP-TEE-configuration-issue/m-p/1473754#M191477</link>
      <description>&lt;P&gt;I am having the exact same issue. Adjusting the parameters to account for only 1 gig of ram gives me the same error as the original poster. Can you send me the information needed to fix this problem?&lt;/P&gt;</description>
      <pubDate>Tue, 14 Jun 2022 15:24:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MM-OP-TEE-configuration-issue/m-p/1473754#M191477</guid>
      <dc:creator>tanner_oakes</dc:creator>
      <dc:date>2022-06-14T15:24:26Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MM OP-TEE configuration issue</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MM-OP-TEE-configuration-issue/m-p/1474752#M191530</link>
      <description>&lt;P&gt;I'm sorry, I have no idea what the issue was or how I resolved it which is the problem with NXP support not sharing answers in public and just emailing them.&lt;/P&gt;&lt;P&gt;I did OPTEE to work on our IMX8MM boards and documented it here:&amp;nbsp;&lt;A href="http://trac.gateworks.com/wiki/venice/tee" target="_blank"&gt;http://trac.gateworks.com/wiki/venice/tee&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 15 Jun 2022 20:49:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MM-OP-TEE-configuration-issue/m-p/1474752#M191530</guid>
      <dc:creator>timharvey</dc:creator>
      <dc:date>2022-06-15T20:49:00Z</dc:date>
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