IMX8MN reserved memory for 512MB LPDDR4

SoniaArevalo — Thu, 02 Jun 2022 10:59:21 GMT

Hello, I'm using a custom IMX8MN board with an ISSI 512MB LPDDR4 memory as follows:

https://www.issi.com/WW/pdf/43-46LQ16256-32128A-AL_.pdf

I have the following configuration:

/tmp/work/imx8mnevk-poky-linux/u-boot-imx/1_2020.04-r0/git/arch/arm/dts/imx8mn.dtsi

memory@40000000 { device_type = "memory"; reg = <0x0 0x40000000 0 0x20000000>; };

/tmp/work-shared/imx8mnevk/kernel-source/arch/arm64/boot/dts/freescale/imx8mn.dtsi

memory@40000000 { device_type = "memory"; reg = <0x0 0x40000000 0 0x20000000>; }; resmem: reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; /* global autoconfigured region for contiguous allocations */ linux,cma { compatible = "shared-dma-pool"; reusable; size = <0 0xa000000>; alloc-ranges = <0 0x40000000 0 0x48000000>; linux,cma-default; }; };

/tmp/work/imx8mnevk-poky-linux/u-boot-imx/1_2020.04-r0/git/include/configs/imx8mn_evk.h

/* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN SZ_32M #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #ifdef CONFIG_TARGET_IMX8MN_DDR3_EVK #define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */ #else //#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ //#define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */ #define PHYS_SDRAM_SIZE 0x20000000 /* 512MB DDR */ #endif #define CONFIG_SYS_MEMTEST_START 0x60000000 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 2)) #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR

Boot is working fine but when is going to run the Kernel, it stops.

This is what I got:

U-Boot SPL 2020.04-5.4.70-2.3.3+g06d688e819 (Jun 02 2022 - 09:00:08 +0000) Can't find PMIC:PCA9450 DDRINFO: start DRAM init DDRINFO: DRAM rate 3200MTS DDRINFO:ddrphy calibration done DDRINFO: ddrmix config done Normal Boot Trying to boot from BOOTROM image offset 0x8000, pagesize 0x200, ivt offset 0x0 NOTICE: BL31: v2.2(release):rel_imx_5.4.70_2.3.6-0-g15e8ff164 NOTICE: BL31: Built : 12:45:09, Apr 19 2022 U-Boot 2020.04-5.4.70-2.3.3+g06d688e819 (Jun 02 2022 - 09:00:08 +0000) CPU: i.MX8MNano QuadLite rev1.0 1500 MHz (running at 1200 MHz) CPU: Commercial temperature grade (0C to 95C) at 36C Reset cause: POR Model: NXP i.MX8MNano LPDDR4 AQUA-UBOOT board DRAM: 480 MiB tcpc_init: Can't find device id=0x52 setup_typec: tcpc port2 init failed, err=-19 TCPC: Vendor ID [0x1fc9], Product ID [0x5110], Addr [I2C1 0x50] SNK.Default on CC2 tcpc_pd_receive_message: Polling ALERT register, TCPC_ALERT_RX_STATUS bit failed, ret = -62 Power supply on USB1 MMC: FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... Run CMD11 1.8V switch *** Warning - bad CRC, using default environment [*]-Video Link 0Can't find cec device id=0x3c fail to probe panel device adv7535@3d failed to get any video link display timings probe video device failed, ret -22 [0] lcd-controller@32e00000, video [1] dsi_controller@32e10000, video_bridge [2] adv7535@3d, panel Can't find cec device id=0x3c fail to probe panel device adv7535@3d failed to get any video link display timings probe video device failed, ret -22 In: serial Out: serial Err: serial BuildInfo: - ATF 15e8ff1 - U-Boot 2020.04-5.4.70-2.3.3+g06d688e819 switch to partitions #0, OK mmc1 is current device flash target is MMC:1 Net: Could not get PHY for FEC0: addr 0 Could not get PHY for FEC0: addr 0 No ethernet found. Fastboot: Normal Normal Boot Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc1 is current device 28078592 bytes read in 1207 ms (22.2 MiB/s) Booting from mmc ... 41998 bytes read in 18 ms (2.2 MiB/s) ## Flattened Device Tree blob at 43000000 Booting using the fdt blob at 0x43000000 Using Device Tree in place at 0000000043000000, end 000000004300d40d Found /gpu@38000000 node Modify /gpu@38000000:status disabled Can't find cec device id=0x3c fail to probe panel device adv7535@3d failed to get any video link display timings probe video device failed, ret -22 Starting kernel ...

I think that is a CMA reserved memory problem so I have tried different configurations but I still not know how to set this properly.

Could anyone explain me how do I set different size configuratios for LPDDR memory?

Best regards, Sonia.

Re: IMX8MN reserved memory for 512MB LPDDR4

AldoG — Thu, 02 Jun 2022 22:39:53 GMT

Hello,

I would like to ask if you have run the DDR stress test and passed?
If not, please find it here:
https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8M-Family-DDR-Tool-Release/ta-p/1104467

Also, regarding CMA you may refer to the following community document
https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/aarch64-Linux-Kernel-Memory-Management/ta-p/1108866

Best regards,
Aldo.

topic IMX8MN reserved memory for 512MB LPDDR4 in i.MX Processors

IMX8MN reserved memory for 512MB LPDDR4

Re: IMX8MN reserved memory for 512MB LPDDR4