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    <title>i.MX Processors中的主题 SNVS</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/SNVS/m-p/1459574#M190482</link>
    <description>&lt;P&gt;I want to use these pins as gpio,&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="2022-05-18_08-37.png" style="width: 485px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/180052i86164F542C1DCF47/image-size/large?v=v2&amp;amp;px=999" role="button" title="2022-05-18_08-37.png" alt="2022-05-18_08-37.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;After set the fuse register value with is 0b11 as below.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="2022-05-18_08-38.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/180053iB995B70AE2795591/image-size/large?v=v2&amp;amp;px=999" role="button" title="2022-05-18_08-38.png" alt="2022-05-18_08-38.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;I still could not set these pins with &lt;STRONG&gt;ALT5&lt;/STRONG&gt; mode. After I write value 0x05 to these register,&amp;nbsp; then i found theses registers sitll 0x00.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="2022-05-18_08-37.png" style="width: 485px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/180054i1ADC8FBB622CA11E/image-size/large?v=v2&amp;amp;px=999" role="button" title="2022-05-18_08-37.png" alt="2022-05-18_08-37.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;I want to know is there some others reigsters should be set ?&lt;/P&gt;</description>
    <pubDate>Wed, 18 May 2022 00:47:27 GMT</pubDate>
    <dc:creator>iysheng</dc:creator>
    <dc:date>2022-05-18T00:47:27Z</dc:date>
    <item>
      <title>SNVS</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SNVS/m-p/1459574#M190482</link>
      <description>&lt;P&gt;I want to use these pins as gpio,&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="2022-05-18_08-37.png" style="width: 485px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/180052i86164F542C1DCF47/image-size/large?v=v2&amp;amp;px=999" role="button" title="2022-05-18_08-37.png" alt="2022-05-18_08-37.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;After set the fuse register value with is 0b11 as below.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="2022-05-18_08-38.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/180053iB995B70AE2795591/image-size/large?v=v2&amp;amp;px=999" role="button" title="2022-05-18_08-38.png" alt="2022-05-18_08-38.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;I still could not set these pins with &lt;STRONG&gt;ALT5&lt;/STRONG&gt; mode. After I write value 0x05 to these register,&amp;nbsp; then i found theses registers sitll 0x00.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="2022-05-18_08-37.png" style="width: 485px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/180054i1ADC8FBB622CA11E/image-size/large?v=v2&amp;amp;px=999" role="button" title="2022-05-18_08-37.png" alt="2022-05-18_08-37.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;I want to know is there some others reigsters should be set ?&lt;/P&gt;</description>
      <pubDate>Wed, 18 May 2022 00:47:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SNVS/m-p/1459574#M190482</guid>
      <dc:creator>iysheng</dc:creator>
      <dc:date>2022-05-18T00:47:27Z</dc:date>
    </item>
    <item>
      <title>Re: SNVS</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SNVS/m-p/1459586#M190485</link>
      <description>&lt;P&gt;what chip are you talking about?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 18 May 2022 01:33:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SNVS/m-p/1459586#M190485</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2022-05-18T01:33:01Z</dc:date>
    </item>
    <item>
      <title>Re: SNVS</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SNVS/m-p/1459590#M190487</link>
      <description>&lt;P&gt;Oh, I'm sorry, the chip I use is i.MX6ULL.&lt;/P&gt;</description>
      <pubDate>Wed, 18 May 2022 01:42:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SNVS/m-p/1459590#M190487</guid>
      <dc:creator>iysheng</dc:creator>
      <dc:date>2022-05-18T01:42:23Z</dc:date>
    </item>
    <item>
      <title>Re: SNVS</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SNVS/m-p/1461906#M190662</link>
      <description>&lt;P&gt;pls refer to the link as below:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/i-MX-Processors/mx6ul-tamper-pin-to-gpio/m-p/485974" target="_blank"&gt;https://community.nxp.com/t5/i-MX-Processors/mx6ul-tamper-pin-to-gpio/m-p/485974&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The definition of TAMPER_PIN_DISABLE[1:0] are&lt;/P&gt;
&lt;P&gt;00 - enabled, TAMPER0-9 used as TAMPER detection pins.&lt;/P&gt;
&lt;P&gt;01 - disabled TAMPER2-4 and TAMPER7-9 used as GPIO.&lt;/P&gt;
&lt;P&gt;10 - disabled TAMPER0-1 and TAMPER5-6 used as GPIO.&lt;/P&gt;
&lt;P&gt;11 - disabled TAMPER0-9 used as GPIO.&lt;/P&gt;
&lt;P&gt;The u-boot command to read TAMPER_PIN_DISABLE is&lt;/P&gt;
&lt;P&gt;=&amp;gt; fuse read 0 3&lt;/P&gt;
&lt;P&gt;If bit [21:20] is 11, then all the ten tamper pins are programmed to GPIO mode. &lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sat, 21 May 2022 07:55:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SNVS/m-p/1461906#M190662</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2022-05-21T07:55:55Z</dc:date>
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