FlexRAM reconfiguration without ITCM

andyteufel — Fri, 13 May 2022 16:01:59 GMT

Hi,

I'm working on a board with an RT1010.

I'm trying to configure FlexRAM to use 64 kB of DTCM and 64 kB of OCRAM, with 0 for ITCM. I followed the instructions in this post. My code starts running but it hardfaults shortly after starting, but it does run a bit. I can't seem to be able to debug it beyond that point.

My project is set up using the SDK from Github. It seems that there are some difference in the source files, but I think I managed to do everything the right way (I hope).

I made the following modifications:

To `startup_MIMXRT1011.S`:

/* Customized FlexRAM bank configuration at runtime */ ldr r0, =0x400ac044 /* Address of register IOMUXC_GPR_GPR17 */ ldr r1, =0x000000a5 /* FlexRAM configuration: OCRAM 64 kB (bank 0 and 1), DTCM 64 kB (bank 2 and 3) */ str r1, [r0] /* Tell the MCU to configure the FlexRAM banks from the register, not from fuses */ ldr r0, =0x400ac040 /* Address of register IOMUXC_GPR_GPR16 */ ldr r1, [r0] orr r1, r1, #4 /* The 4 corresponds to setting the FLEXRAM_BANK_CFG_SEL bit in register IOMUXC_GPR_GPR16 */ str r1, [r0] /* Disable ITCM, we are not using it */ ldr r0, =0x400ac040 /* Address of register IOMUXC_GPR_GPR16 */ ldr r1, [r0] and r1, r1, #0xfffffffe /* Clear INIT_ITCM_EN bit in register IOMUXC_GPR_GPR16: We have configured the ITCM with size 0 */ str r1, [r0] /* Adjust the DTCM/ITCM sizes */ ldr r0, =0x400ac038 /* Address of register IOMUXC_GPR_GPR14 */ ldr r1, [r0] and r1, r1, #0xff00ffff /* Clear the ITCM/DTCM size bits in register IOMUXC_GPR_GPR14 */ orr r1, r1, #0x00700000 /* Set the bits for DTCM to have size 64 KB */ str r1, [r0]

In the function that configures the MPU:

/* Region 5 setting: Memory with Normal type, not shareable, outer/inner write back */ MPU->RBAR = ARM_MPU_RBAR(5, 0x00000000U); MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_32B); /* Region 6 setting: Memory with Normal type, not shareable, outer/inner write back */ MPU->RBAR = ARM_MPU_RBAR(6, 0x20000000U); MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_64KB); /* Region 7 setting: Memory with Normal type, not shareable, outer/inner write back */ MPU->RBAR = ARM_MPU_RBAR(7, 0x20200000U); MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_64KB);

I have attached my linker script as a text file.

I have seen something about a flash driver file (source), but I have no idea what that is or whether that is relevant in my case. I'm not using such a file AFAIK, I am flashing and debugging my device using a JLink.

I'd appreciate any help with this issue.

Re: FlexRAM reconfiguration without ITCM

Omar_Anguiano — Tue, 14 Jun 2022 23:36:39 GMT

Hello
Hope you are well. I will gladly help you with this.

I suggest you using the most recent SDK version from the SDK builder: https://mcuxpresso.nxp.com/en/welcome

If there is a request to have 0 kB of any TCM memory, disable the corresponding TCM before setting the size to 0 kB. Use the INT_xTCM_EN fields in the IOMUXC_GPR_GPR16 register to disable the corresponding xTCM memory before configuring it to 0 kB.

If you have more questions do not hesitate to ask me.
Best regards,
Omar

i.MX Processors中的主题 FlexRAM reconfiguration without ITCM

FlexRAM reconfiguration without ITCM

Re: FlexRAM reconfiguration without ITCM