https://community.nxp.com/t5/i-MX-Processors/About-MIMXRT1172AVM8A-programming-problem/m-p/1451560#M189897 <P>Hi Sir,</P><P>We are a third party programmer manufacturer and are currently developing the MIMXRT1172 Programming Process (OCOTP).</P><P><BR />We can read the core ID using J-link (SWD interface), but the connected fail.</P><P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="擷取.JPG" style="width: 400px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/178488i964356D6874F1B7C/image-size/medium?v=v2&amp;px=400" role="button" title="擷取.JPG" alt="擷取.JPG" /></span></P><P>Also, the test uses the SWD interface to read register 40CA_C0B0 (OTP Controller Version Register (VERSION)) and can't read the value 0A00_0000h.</P><P>Writed to other registers, such as 40CA_C0B0 (OTP Controller Control and Status Register (CTRL), also can't be written (SWD ack fault).</P><P>It seems that read and write registers is unsuccessful.</P><P>The socket circuit is as follows, where improvements or suggestions are needed. Or are there process steps for read and write the OCOTP register for reference?</P><P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="擷取1.JPG" style="width: 400px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/178489i4B6FAFA25A298666/image-size/medium?v=v2&amp;px=400" role="button" title="擷取1.JPG" alt="擷取1.JPG" /></span></P><P> Thanks</P> Sat, 30 Apr 2022 06:09:40 GMT gary_yang 2022-04-30T06:09:40Z https://community.nxp.com/t5/i-MX-Processors/About-MIMXRT1172AVM8A-programming-problem/m-p/1451560#M189897 <P>Hi Sir,</P><P>We are a third party programmer manufacturer and are currently developing the MIMXRT1172 Programming Process (OCOTP).</P><P><BR />We can read the core ID using J-link (SWD interface), but the connected fail.</P><P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="擷取.JPG" style="width: 400px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/178488i964356D6874F1B7C/image-size/medium?v=v2&amp;px=400" role="button" title="擷取.JPG" alt="擷取.JPG" /></span></P><P>Also, the test uses the SWD interface to read register 40CA_C0B0 (OTP Controller Version Register (VERSION)) and can't read the value 0A00_0000h.</P><P>Writed to other registers, such as 40CA_C0B0 (OTP Controller Control and Status Register (CTRL), also can't be written (SWD ack fault).</P><P>It seems that read and write registers is unsuccessful.</P><P>The socket circuit is as follows, where improvements or suggestions are needed. Or are there process steps for read and write the OCOTP register for reference?</P><P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="擷取1.JPG" style="width: 400px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/178489i4B6FAFA25A298666/image-size/medium?v=v2&amp;px=400" role="button" title="擷取1.JPG" alt="擷取1.JPG" /></span></P><P> Thanks</P> Sat, 30 Apr 2022 06:09:40 GMT https://community.nxp.com/t5/i-MX-Processors/About-MIMXRT1172AVM8A-programming-problem/m-p/1451560#M189897 gary_yang 2022-04-30T06:09:40Z