topic Re: i.MX257 boot from NAND flash in i.MX Processors

i.MX257 boot from NAND flash

loicboissy — Tue, 17 Sep 2013 15:03:54 GMT

We programed barebox on our Nand Flash (Micron 29F4G08ABADA) with ATK software.

But we cannot boot automatically from Nand Flash (internal boot mode).

Only the first half of the main flash buffer is loaded by the ROM bootloader.

It seems to be related to the fact that our NAND flash has 64 pages per block while the original NAND flash provided on FreeScale PDK was 128. Actually, 128 is the default value of the NFC (NAND Flash Controller).

We can change that manually with our JTAG debugger but it has to be done quite early in the ROM boot process in order to make barebox boot.

Is there a way to change the default value used by the NFC in order to tell the ROM bootloader the correct number of pages per block?

Thanks.

Loic

Re: i.MX257 boot from NAND flash

Yuri — Wed, 18 Sep 2013 05:23:25 GMT

Table 7-29 (NAND Device Accesses) of the i.MX25 Reference Manual shows NAND parameters for boot.

Perhaps it makes sense to try the following boot NAND configuration 2KB SLC, 5 address cycles.

Re: i.MX257 boot from NAND flash

loicboissy — Wed, 18 Sep 2013 06:55:07 GMT

Yes thanks, but we use this configuration :

Hardware PIN configuration :

- BT_DPARE_SIZE = 218

- BT_MLC-SEL = SLC

- BT_PAGE_SIZE = 2k

- BT_MEM_CTRL = Nand Flash

- BT_MEM_TYPE = 5 address cycles

After a power on, we can read 0x640001E0 value in the RCSR regsiter.

For us, it seems correct.

We are checking the NFC controler configuration...

In NAND_FLASH_CONFIG1 register (0xBB001E1A), we can read 0x0C0A. It seems not correct,

If we set 0x0A09 in this register using our hardware debug probe (by using a breakpoint just after the reading of RCSR register) => barebox starts well.

If is set the same configuration in the DCD table (inside our barebox binary file) : it doesn't work.

Maybe DCD configuration is applied too late...

Is it possible to configure or (re-configure) the NFC controler with the DCD table?

Loic