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    <title>i.MX ProcessorsのトピックRe: Access to RTC from Cortex-M4 on i.MX8M Mini</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Access-to-RTC-from-Cortex-M4-on-i-MX8M-Mini/m-p/1447073#M189548</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I'm trying to achieve the same.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;this is the dump of the registers&lt;/P&gt;&lt;P&gt;SNVS_HP Command Register: 80002100&lt;BR /&gt;SNVS_HP Control Register: 0&lt;BR /&gt;SNVS_HP Status Register: 80009b00&lt;BR /&gt;SNVS_HP Real Time Counter MSB Register: 0&lt;BR /&gt;SNVS_HP Real Time Counter LSB Register: 0&lt;BR /&gt;&lt;BR /&gt;SNVS_LP Control Register: 21&lt;BR /&gt;SNVS_LP Status Register: 40000000&lt;BR /&gt;SNVS_LP Lock Register: 0&lt;BR /&gt;SNVS_LP Real Time Counter MSB Register: 0&lt;BR /&gt;SNVS_LP Real Time Counter LSB Register: 0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Writing 1 to SNVS_HP Control Register will enable the HP real time counter, but then it will become just another independent real time counter at 32KHz, that's not want we want.&lt;/P&gt;&lt;P&gt;SNVS_LP Real Time Counter is always returning 0 , that is strange as bit 31 in SNVS_HP Command Register should guarantee access to privileged registers.&lt;/P&gt;</description>
    <pubDate>Thu, 21 Apr 2022 08:46:41 GMT</pubDate>
    <dc:creator>RoccoBr</dc:creator>
    <dc:date>2022-04-21T08:46:41Z</dc:date>
    <item>
      <title>Access to RTC from Cortex-M4 on i.MX8M Mini</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Access-to-RTC-from-Cortex-M4-on-i-MX8M-Mini/m-p/1438744#M188956</link>
      <description>&lt;P&gt;Hi,&amp;nbsp;&lt;BR /&gt;I am using Cortex-M4 with FreeRTOS to communicate with an external sensor. The data is received by the M4 and available to the A53 via RPMsg. It works fine. Additionally, I would like to be able to configure the internal RTC using A53 and read the time from the RTC using M4. It is possible? Currently with Linux running on A53 I can set and get the time from RTC (SNVS_LP). I tried to read value from RTC with M4 directly from registers but unfortunately can't do that.&lt;/P&gt;&lt;P&gt;Function for read time in Cortex-M4:&lt;/P&gt;&lt;LI-CODE lang="c"&gt;static uint32_t SNVS_LP_RTC_GetSeconds(SNVS_Type *base)
{
    uint32_t seconds = 0;
    uint32_t tmp     = 0;

    /* Do consecutive reads until value is correct */
    do
    {
        seconds = tmp;
        tmp     = (base-&amp;gt;LPSMCMR &amp;lt;&amp;lt; 17U);
        tmp |= (base-&amp;gt;LPSMCLR &amp;gt;&amp;gt; 15U);
    } while (tmp != seconds);

    return seconds;
}&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Device tree configuration:&lt;/P&gt;&lt;LI-CODE lang="c"&gt;			snvs: snvs@30370000 {
				compatible = "fsl,sec-v4.0-mon","syscon", "simple-mfd";
				reg = &amp;lt;0x30370000 0x10000&amp;gt;;

				snvs_rtc: snvs-rtc-lp {
					compatible = "fsl,sec-v4.0-mon-rtc-lp";
					regmap = &amp;lt;&amp;amp;snvs&amp;gt;;
					offset = &amp;lt;0x34&amp;gt;;
					interrupts = &amp;lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH&amp;gt;,
						     &amp;lt;GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH&amp;gt;;
					clocks = &amp;lt;&amp;amp;clk IMX8MM_CLK_SNVS_ROOT&amp;gt;;
					clock-names = "snvs-rtc";
				};

				snvs_pwrkey: snvs-powerkey {
					compatible = "fsl,sec-v4.0-pwrkey";
					regmap = &amp;lt;&amp;amp;snvs&amp;gt;;
					interrupts = &amp;lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&amp;gt;;
					clocks = &amp;lt;&amp;amp;clk IMX8MM_CLK_SNVS_ROOT&amp;gt;;
					clock-names = "snvs";
					linux,keycode = &amp;lt;KEY_POWER&amp;gt;;
					wakeup-source;
					status = "disabled";
				};
			};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;In the documentation I found information that: "The SNVS_HP provides an interface between SNVS_LP and the rest of the system", so I modified ATF in the following way:&lt;/P&gt;&lt;LI-CODE lang="c"&gt;--- a/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c	2022-01-25 15:28:29.000000000 +0100
+++ b/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c	2022-01-25 15:42:05.000000000 +0100
@@ -58,8 +58,7 @@
 	RDC_MDAn(RDC_MDA_M4, DID1),
 
 	/* peripherals domain permission */
-	RDC_PDAPn(RDC_PDAP_UART4, D0R | D0W),
-	RDC_PDAPn(RDC_PDAP_UART2, D0R | D0W),
+	RDC_PDAPn(RDC_PDAP_eCSPI2, D1R | D1W),
+	RDC_PDAPn(RDC_PDAP_SNVS_HP, D1R | D0R | D0W),
 
 	/* memory region */&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am confused on how to access the RTC with Cortex-M4 and kindly ask for help.&lt;/P&gt;&lt;P&gt;Thank you in advance for your help&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Patryk&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 05 Apr 2022 08:41:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Access-to-RTC-from-Cortex-M4-on-i-MX8M-Mini/m-p/1438744#M188956</guid>
      <dc:creator>Patryk</dc:creator>
      <dc:date>2022-04-05T08:41:15Z</dc:date>
    </item>
    <item>
      <title>Re: Access to RTC from Cortex-M4 on i.MX8M Mini</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Access-to-RTC-from-Cortex-M4-on-i-MX8M-Mini/m-p/1447073#M189548</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I'm trying to achieve the same.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;this is the dump of the registers&lt;/P&gt;&lt;P&gt;SNVS_HP Command Register: 80002100&lt;BR /&gt;SNVS_HP Control Register: 0&lt;BR /&gt;SNVS_HP Status Register: 80009b00&lt;BR /&gt;SNVS_HP Real Time Counter MSB Register: 0&lt;BR /&gt;SNVS_HP Real Time Counter LSB Register: 0&lt;BR /&gt;&lt;BR /&gt;SNVS_LP Control Register: 21&lt;BR /&gt;SNVS_LP Status Register: 40000000&lt;BR /&gt;SNVS_LP Lock Register: 0&lt;BR /&gt;SNVS_LP Real Time Counter MSB Register: 0&lt;BR /&gt;SNVS_LP Real Time Counter LSB Register: 0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Writing 1 to SNVS_HP Control Register will enable the HP real time counter, but then it will become just another independent real time counter at 32KHz, that's not want we want.&lt;/P&gt;&lt;P&gt;SNVS_LP Real Time Counter is always returning 0 , that is strange as bit 31 in SNVS_HP Command Register should guarantee access to privileged registers.&lt;/P&gt;</description>
      <pubDate>Thu, 21 Apr 2022 08:46:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Access-to-RTC-from-Cortex-M4-on-i-MX8M-Mini/m-p/1447073#M189548</guid>
      <dc:creator>RoccoBr</dc:creator>
      <dc:date>2022-04-21T08:46:41Z</dc:date>
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