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    <title>i.MX ProcessorsのトピックRe: Device Tree To Support DDC/CI For HDMI On i.MX8</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Device-Tree-To-Support-DDC-CI-For-HDMI-On-i-MX8/m-p/1446481#M189527</link>
    <description>&lt;P&gt;I'm using the i.MX 8M, I believe. It's a BCM AR8MXMQ board.&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.bcmcom.com/bcm_product_AR8MXMQ.html" target="_blank"&gt;https://www.bcmcom.com/bcm_product_AR8MXMQ.html&lt;/A&gt;&lt;/P&gt;</description>
    <pubDate>Wed, 20 Apr 2022 14:46:07 GMT</pubDate>
    <dc:creator>kendalla59</dc:creator>
    <dc:date>2022-04-20T14:46:07Z</dc:date>
    <item>
      <title>Device Tree To Support DDC/CI For HDMI On i.MX8</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Device-Tree-To-Support-DDC-CI-For-HDMI-On-i-MX8/m-p/1445251#M189448</link>
      <description>&lt;P&gt;I have a small embedded HDMI display, and I would like to add some monitor controls into the user interface. The display supports DDC/CI but my i.MX8 device tree does not expose the i2c lines for the HDMI port. I've searched through the linux-imx/arch/arm64/boot/dts/freescale files, and I can't find any examples of this.&lt;/P&gt;&lt;P&gt;Can somebody please help me to get access to the dedicated SDA/SCL for the HDMI interface?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 18 Apr 2022 21:11:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Device-Tree-To-Support-DDC-CI-For-HDMI-On-i-MX8/m-p/1445251#M189448</guid>
      <dc:creator>kendalla59</dc:creator>
      <dc:date>2022-04-18T21:11:20Z</dc:date>
    </item>
    <item>
      <title>Re: Device Tree To Support DDC/CI For HDMI On i.MX8</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Device-Tree-To-Support-DDC-CI-For-HDMI-On-i-MX8/m-p/1446233#M189517</link>
      <description>&lt;P&gt;what imx8 processor do you use? imx8qm?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 20 Apr 2022 08:31:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Device-Tree-To-Support-DDC-CI-For-HDMI-On-i-MX8/m-p/1446233#M189517</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2022-04-20T08:31:45Z</dc:date>
    </item>
    <item>
      <title>Re: Device Tree To Support DDC/CI For HDMI On i.MX8</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Device-Tree-To-Support-DDC-CI-For-HDMI-On-i-MX8/m-p/1446481#M189527</link>
      <description>&lt;P&gt;I'm using the i.MX 8M, I believe. It's a BCM AR8MXMQ board.&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.bcmcom.com/bcm_product_AR8MXMQ.html" target="_blank"&gt;https://www.bcmcom.com/bcm_product_AR8MXMQ.html&lt;/A&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 20 Apr 2022 14:46:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Device-Tree-To-Support-DDC-CI-For-HDMI-On-i-MX8/m-p/1446481#M189527</guid>
      <dc:creator>kendalla59</dc:creator>
      <dc:date>2022-04-20T14:46:07Z</dc:date>
    </item>
    <item>
      <title>Re: Device Tree To Support DDC/CI For HDMI On i.MX8</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Device-Tree-To-Support-DDC-CI-For-HDMI-On-i-MX8/m-p/1610747#M202420</link>
      <description>&lt;P&gt;Hi we've had a similar problem with wanting to send commands over the DDC lines.&lt;/P&gt;&lt;P&gt;Take a look at the cdns_hdmi_scdc_write function.&lt;/P&gt;&lt;P&gt;&lt;A href="https://github.com/nxp-imx/linux-imx/blob/lf-5.15.y/drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdmi.c#L119" target="_blank"&gt;https://github.com/nxp-imx/linux-imx/blob/lf-5.15.y/drivers/gpu/drm/bridge/cadence/cdns-mhdp-hdmi.c#L119&lt;/A&gt;&lt;/P&gt;&lt;P&gt;It is possible create a custom function similar to the cdns_hdmi_scdc. The data can be hardcoded in the driver and called from initialization or via sysfs interface.&lt;/P&gt;&lt;P&gt;Just make sure to have the 0 and 1 in the message in the same way as in the&amp;nbsp;cdns_hdmi_scdc_write function otherwise the packet isn't sent properly. I believe it's some kind of message protocol to the mailbox register of the HDMI IP but I'm not entirely sure.&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Darko&lt;/P&gt;</description>
      <pubDate>Tue, 07 Mar 2023 09:10:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Device-Tree-To-Support-DDC-CI-For-HDMI-On-i-MX8/m-p/1610747#M202420</guid>
      <dc:creator>darko31</dc:creator>
      <dc:date>2023-03-07T09:10:06Z</dc:date>
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