iMX8QM - Ethernet TX Clock problem

sig0912 — Thu, 31 Mar 2022 13:44:15 GMT

Hi Community,

I'm working with iMX8QM, u-boot 2020.04-imx_v2020.04_5.4.47_2.2.0. I'm trying to configure the RGMII 100Mbps Ethernet. PHY is Marvell 88q2110.

The ethernet reference clock should be :
- 25MHz when using 100Mbps Ethernet
- 125MHz when using 1Gbps Ethernet

From the datasheet below the RGMII operates at 125MHz.

Since I'm using 100Mbps ethernet I would like to use 25Mhz as the ethernet reference clock.
Currently when pinging the board from my computer, the activity led blinks on the iMX8 board but I get no response.

Here are my questions:
1 - Does the reference clock automatically switch when 100Mbps of 1Gbps is detected?
1a - If yes, is it connecting 25MHz on RGMII_TXC using CONN_ENET0_REFCLK_125M_25M?

1b - If not, how can I configure RGMII_TXC to use 25MHz?

At the moment I'm unable to check the clock due to the board being in a box but I will be able to scope that next week.

Here is what I have configured in my .dts

&fec1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec1>; phy-mode = "rgmii-rxid"; phy-handle = <&ethphy0>; fsl,magic-packet; fsl,rgmii_txc_dly; status = "okay"; local-mac-address = [00 a8 44 1f 1f 10]; mdio { #address-cells = <1>; #size-cells = <0>; ethphy0: ethernet-phy@4 { compatible = "ethernet-phy-id002b.0980", "ethernet-phy-ieee802.3-c45"; reg = <4>; max-speed = <100>; }; }; }; pinctrl_fec1: fec1grp { fsl,pins = < SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD 0x000014a0 SC_P_ENET0_MDC_CONN_ENET0_MDC 0x06000020 SC_P_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020 SC_P_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC 0x00000061 SC_P_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x00000061 SC_P_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x00000061 SC_P_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x00000061 SC_P_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2 0x00000061 SC_P_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3 0x00000061 SC_P_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC 0x00000061 SC_P_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x00000061 SC_P_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x00000061 SC_P_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x00000061 SC_P_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2 0x00000021 SC_P_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3 0x00000061 >; };

I also tried forcing the 25MHz by adding the following in the fec1 node

assigned-clocks = <&clk IMX8QM_ENET0_ROOT_DIV>, <&clk IMX8QM_ENET0_REF_DIV>; assigned-clock-rates = <25000000>, <25000000>;

When I check clk dump I have the following. Also not sure why ENET0_RGMII_DIV is 0

Thanks for your help

Best Regards,
Ingrid

i.MX ProcessorsのトピックiMX8QM - Ethernet TX Clock problem

iMX8QM - Ethernet TX Clock problem