<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX ProcessorsのトピックRe: IMX8M mini Cortex-M ECSPI Pin Config</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX8M-mini-Cortex-M-ECSPI-Pin-Config/m-p/1427245#M188136</link>
    <description>&lt;P&gt;Hi Aldo,&lt;/P&gt;&lt;P&gt;Thanks for your reply,&lt;/P&gt;&lt;P&gt;ECSPI driver both polling and interrupt CS not proper. I have used GPIO for CS now issue resolved.&lt;/P&gt;&lt;P&gt;Ticket - &lt;A href="https://community.nxp.com/t5/i-MX-Processors/IMX8M-mini-Cortex-M4-SDK-ECSPI1-Issue/m-p/1424618#M187952" target="_blank"&gt;https://community.nxp.com/t5/i-MX-Processors/IMX8M-mini-Cortex-M4-SDK-ECSPI1-Issue/m-p/1424618#M187952&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks &amp;amp; Regards,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Vasu&lt;/P&gt;</description>
    <pubDate>Sat, 12 Mar 2022 08:20:10 GMT</pubDate>
    <dc:creator>Dhevan</dc:creator>
    <dc:date>2022-03-12T08:20:10Z</dc:date>
    <item>
      <title>IMX8M mini Cortex-M ECSPI Pin Config</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8M-mini-Cortex-M-ECSPI-Pin-Config/m-p/1422887#M187767</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I have configured ecspi1 for cortex m4 core.&lt;/P&gt;&lt;P&gt;I had found issue chip select does not working.&lt;/P&gt;&lt;LI-CODE lang="c"&gt;    IOMUXC_SetPinMux(IOMUXC_ECSPI1_MISO_ECSPI1_MISO, 0U);
    IOMUXC_SetPinConfig(IOMUXC_ECSPI1_MISO_ECSPI1_MISO, 
                        IOMUXC_SW_PAD_CTL_PAD_DSE(6U) |
                        IOMUXC_SW_PAD_CTL_PAD_HYS_MASK);
    IOMUXC_SetPinMux(IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI, 0U);
    IOMUXC_SetPinConfig(IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI, 
                        IOMUXC_SW_PAD_CTL_PAD_DSE(6U) |
                        IOMUXC_SW_PAD_CTL_PAD_HYS_MASK);
    IOMUXC_SetPinMux(IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK, 0U);
    IOMUXC_SetPinConfig(IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK, 
                        IOMUXC_SW_PAD_CTL_PAD_DSE(6U) |
                        IOMUXC_SW_PAD_CTL_PAD_HYS_MASK |
                        IOMUXC_SW_PAD_CTL_PAD_PE_MASK);
    IOMUXC_SetPinMux(IOMUXC_ECSPI1_SS0_ECSPI1_SS0, 0U);
    IOMUXC_SetPinConfig(IOMUXC_ECSPI1_SS0_ECSPI1_SS0, 
                        IOMUXC_SW_PAD_CTL_PAD_DSE(6U) |
                        IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
                        IOMUXC_SW_PAD_CTL_PAD_HYS_MASK |
                        IOMUXC_SW_PAD_CTL_PAD_PE_MASK);&lt;/LI-CODE&gt;&lt;P&gt;If we remove spi cs configuration and configured as a gpio that time is working but we want interrupt method to read data from spi we can't control the gpio.&lt;/P&gt;&lt;P&gt;Why chip select pin doesn't working ?&lt;/P&gt;&lt;P&gt;How to configure chip select pin properly ?&lt;/P&gt;&lt;P&gt;2) Another issue is writing data to the spi transmit structure it's sending only first byte.&lt;/P&gt;&lt;P&gt;example.&lt;/P&gt;&lt;LI-CODE lang="c"&gt;uint8_t tx_buff[2];
uint8_t rx_buff[2];
tx_buff[0] = '0x45';
tx_buff[1] = '0x34';

masterXfer.txData = (uint32_t *)tx_buff;
masterXfer.rxData = NULL;
masterXfer.dataSize = 2;
masterXfer.channel = kECSPI_Channel0;
//GPIO_PinWrite(EXAMPLE_LED_GPIO, EXAMPLE_LED_GPIO_PIN, 0U);
ECSPI_MasterTransferBlocking(EXAMPLE_ECSPI_MASTER_BASEADDR, &amp;amp;masterXfer);&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp; In above code second byte doesn't proper it's sending some junk data.&lt;/P&gt;&lt;P&gt;&amp;nbsp; How to write 1byte data properly ?&lt;/P&gt;</description>
      <pubDate>Thu, 03 Mar 2022 19:04:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8M-mini-Cortex-M-ECSPI-Pin-Config/m-p/1422887#M187767</guid>
      <dc:creator>Dhevan</dc:creator>
      <dc:date>2022-03-03T19:04:58Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8M mini Cortex-M ECSPI Pin Config</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8M-mini-Cortex-M-ECSPI-Pin-Config/m-p/1427197#M188129</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;In our demo example we do use CS not a GPIO, I believe you have used this example as reference. We use ECSPI2 I'll check if there are some issues with ECSPI1 CS.&lt;BR /&gt;&lt;BR /&gt;Could you share the junk data received?&lt;BR /&gt;for example is it random data?&lt;BR /&gt;&lt;BR /&gt;Best regards,&lt;BR /&gt;Aldo.&lt;/P&gt;</description>
      <pubDate>Sat, 12 Mar 2022 00:41:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8M-mini-Cortex-M-ECSPI-Pin-Config/m-p/1427197#M188129</guid>
      <dc:creator>AldoG</dc:creator>
      <dc:date>2022-03-12T00:41:54Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8M mini Cortex-M ECSPI Pin Config</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8M-mini-Cortex-M-ECSPI-Pin-Config/m-p/1427245#M188136</link>
      <description>&lt;P&gt;Hi Aldo,&lt;/P&gt;&lt;P&gt;Thanks for your reply,&lt;/P&gt;&lt;P&gt;ECSPI driver both polling and interrupt CS not proper. I have used GPIO for CS now issue resolved.&lt;/P&gt;&lt;P&gt;Ticket - &lt;A href="https://community.nxp.com/t5/i-MX-Processors/IMX8M-mini-Cortex-M4-SDK-ECSPI1-Issue/m-p/1424618#M187952" target="_blank"&gt;https://community.nxp.com/t5/i-MX-Processors/IMX8M-mini-Cortex-M4-SDK-ECSPI1-Issue/m-p/1424618#M187952&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks &amp;amp; Regards,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Vasu&lt;/P&gt;</description>
      <pubDate>Sat, 12 Mar 2022 08:20:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8M-mini-Cortex-M-ECSPI-Pin-Config/m-p/1427245#M188136</guid>
      <dc:creator>Dhevan</dc:creator>
      <dc:date>2022-03-12T08:20:10Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8M mini Cortex-M ECSPI Pin Config</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8M-mini-Cortex-M-ECSPI-Pin-Config/m-p/1427249#M188137</link>
      <description>&lt;P&gt;ok&lt;/P&gt;</description>
      <pubDate>Sat, 12 Mar 2022 08:40:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8M-mini-Cortex-M-ECSPI-Pin-Config/m-p/1427249#M188137</guid>
      <dc:creator>josephzhou1</dc:creator>
      <dc:date>2022-03-12T08:40:34Z</dc:date>
    </item>
  </channel>
</rss>

