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    <title>topic Re: IMX8MP use both ISI and ISP in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1423991#M187900</link>
    <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/109210"&gt;@malik_cisse&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;The only thing I tested myself personally was:&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;|------------------------&amp;gt;&amp;nbsp; ISI0&lt;/P&gt;
&lt;P&gt;CSI2 ---&amp;gt; ISP0--------&amp;gt;|&amp;nbsp; &amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;|-------------------------&amp;gt; ISI1&lt;/P&gt;
&lt;P&gt;But that was possible because ISI can have as input CSI2 or AXI Memory, and used the m2m functionality of ISI.&lt;/P&gt;
&lt;P&gt;The scenarios &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/147542"&gt;@khang_letruong&lt;/a&gt;&amp;nbsp;(btw thanks for explaining the use case) mentioned, indeed not sure if are feasible because looking at the 8MP RM it is stated:&amp;nbsp;&lt;/P&gt;
&lt;BLOCKQUOTE&gt;
&lt;P&gt;There are two instances of ISP on the chip and each is connected to separate instances of&lt;BR /&gt;MIPI CSI.&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;
&lt;P&gt;So my understanding would be that I can't have the ISP input coming from anywhere else but camera sensor.&lt;/P&gt;
&lt;P&gt;But let me look into the possibility I mentioned few messages above to see if it actually works and if we have some examples.&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Diana&lt;/P&gt;</description>
    <pubDate>Mon, 07 Mar 2022 15:33:53 GMT</pubDate>
    <dc:creator>dianapredescu</dc:creator>
    <dc:date>2022-03-07T15:33:53Z</dc:date>
    <item>
      <title>IMX8MP use both ISI and ISP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1420521#M187582</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Is it actually possible to have both enabled, ISI and ISP?&lt;BR /&gt;My use case:&lt;/P&gt;&lt;P&gt;Raw bayer CSI camera -&amp;gt;ISI-&amp;gt;ISP-&amp;gt; preview on screen&lt;/P&gt;&lt;P&gt;ISI-&amp;gt; Software ISP-&amp;gt; 12bit TIFF snapshots&lt;/P&gt;&lt;P&gt;This is to enable 12bit high resolution snapshots without stopping live preview.&lt;/P&gt;&lt;P&gt;BR, MC&lt;/P&gt;</description>
      <pubDate>Mon, 28 Feb 2022 10:46:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1420521#M187582</guid>
      <dc:creator>malik_cisse</dc:creator>
      <dc:date>2022-02-28T10:46:30Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP use both ISI and ISP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1421106#M187640</link>
      <description>&lt;P&gt;why do you need connect isi to isp? why don't you connect your camera to ISP directly? imx8mp has dual isp, you can use dual ISP directly&lt;/P&gt;</description>
      <pubDate>Tue, 01 Mar 2022 09:10:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1421106#M187640</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2022-03-01T09:10:21Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP use both ISI and ISP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1421198#M187651</link>
      <description>&lt;P&gt;Hi Joanxie,&lt;/P&gt;&lt;P&gt;The idea is to use ISI Raw Bayer 12bit output on /dev/video0 while on the same time use ISP processed image on /dev/video1 for example.&lt;/P&gt;&lt;P&gt;This way I have two independant video sources, one for display and one for Raw snapshots.&lt;/P&gt;&lt;P&gt;I know I can set ISP in bypass mode and get RG12 Raw Bayer image but I need to stop the display pipeline first for that.&amp;nbsp;&lt;/P&gt;&lt;P&gt;I don't want to stop display pipeline because this is bad user experience.&lt;/P&gt;&lt;P&gt;BR, MC&lt;/P&gt;</description>
      <pubDate>Tue, 01 Mar 2022 11:24:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1421198#M187651</guid>
      <dc:creator>malik_cisse</dc:creator>
      <dc:date>2022-03-01T11:24:24Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP use both ISI and ISP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1421219#M187652</link>
      <description>&lt;P&gt;Hi Malik,&lt;/P&gt;
&lt;P&gt;not sure if it will answer your question, but in theory&amp;nbsp;one CSI2 channel can output to ISI and ISP at the same time. It should look like this:&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; |------------------------&amp;gt;&amp;nbsp; ISI0&lt;/P&gt;
&lt;P&gt;CSI2 --------&amp;gt;|&amp;nbsp;&amp;nbsp; (no need any operation of register for this mux)&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; |-------------------------&amp;gt; ISP0&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Diana&lt;/P&gt;</description>
      <pubDate>Tue, 01 Mar 2022 12:11:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1421219#M187652</guid>
      <dc:creator>dianapredescu</dc:creator>
      <dc:date>2022-03-01T12:11:08Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP use both ISI and ISP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1421268#M187654</link>
      <description>&lt;P&gt;Hi Diana,&lt;/P&gt;&lt;P&gt;Thanks for the hint although I knew that already.&lt;/P&gt;&lt;P&gt;My question is whether I can connect ISI to ISP and use both outputs simultaneously.&lt;/P&gt;&lt;P&gt;Thx, MC&lt;/P&gt;</description>
      <pubDate>Tue, 01 Mar 2022 14:12:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1421268#M187654</guid>
      <dc:creator>malik_cisse</dc:creator>
      <dc:date>2022-03-01T14:12:36Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP use both ISI and ISP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1422391#M187719</link>
      <description>&lt;P&gt;you can use ISI and ISP in the same time, don't need connect ISI to ISP, you can use ISI to raw data output and ISP to display&lt;/P&gt;</description>
      <pubDate>Thu, 03 Mar 2022 03:47:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1422391#M187719</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2022-03-03T03:47:23Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP use both ISI and ISP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1422626#M187750</link>
      <description>&lt;P&gt;Hi Joanxie,&lt;/P&gt;&lt;P&gt;&amp;gt;&amp;gt;&lt;SPAN&gt;you can use ISI and ISP in the same time, don't need connect ISI to ISP, you can use ISI to raw data output and ISP to display&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Awesome! Well this is exactly what I need. When I tried to enable both ISI and ISP in parallel one year ago it did not work though. no /dev/video0 device node was created. I had to remove ISI from device tree in order to make ISP work.&lt;/P&gt;&lt;P&gt;Can you please point me to any example that demonstrate this?&lt;/P&gt;&lt;P&gt;BR, MC&lt;/P&gt;</description>
      <pubDate>Thu, 03 Mar 2022 10:31:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1422626#M187750</guid>
      <dc:creator>malik_cisse</dc:creator>
      <dc:date>2022-03-03T10:31:18Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP use both ISI and ISP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1423328#M187816</link>
      <description>&lt;P&gt;current bsp already support ISP+ISI in the same time, you can refer to this：&lt;/P&gt;
&lt;P&gt;“&lt;A href="https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-evk-basler-ov5640.dts?h=lf-5.10.y”" target="_blank"&gt;https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-evk-basler-ov5640.dts?h=lf-5.10.y”&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;this dts support ov5640 with ISI and basler with ISP in the same time, you can refer to this&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 04 Mar 2022 14:23:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1423328#M187816</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2022-03-04T14:23:52Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP use both ISI and ISP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1423394#M187821</link>
      <description>&lt;P&gt;Unfortunately this link is not working:&lt;/P&gt;&lt;P&gt;“&lt;A href="https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-evk-basler-ov5640.dts?h=lf-5.10.y”" target="_blank"&gt;https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-evk-basler-ov5640.dts?h=lf-5.10.y”&lt;/A&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 04 Mar 2022 17:06:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1423394#M187821</guid>
      <dc:creator>malik_cisse</dc:creator>
      <dc:date>2022-03-04T17:06:06Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP use both ISI and ISP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1423482#M187830</link>
      <description>&lt;P&gt;you can select version on the top right corner, try again&lt;/P&gt;
&lt;P&gt;"&lt;A href="https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-evk-basler-ov5640.dts?h=lf-5.10.y" target="_blank"&gt;https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-evk-basler-ov5640.dts?h=lf-5.10.y&lt;/A&gt;"&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sat, 05 Mar 2022 02:39:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1423482#M187830</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2022-03-05T02:39:55Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP use both ISI and ISP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1423891#M187887</link>
      <description>&lt;P&gt;Hi Joan,&lt;/P&gt;&lt;P&gt;This time the link you sent works.&lt;/P&gt;&lt;P&gt;However when I implement same device tree as you sent I do not get any image on "/dev/video0" anymore.&lt;/P&gt;&lt;P&gt;When launching gstreamer pipeline:&lt;/P&gt;&lt;P&gt;gst-launch-1.0 v4l2src device=/dev/video0 ! video/x-raw,width=3840,height=2160 ! queue ! videocrop top=0 left=120 right=120 bottom=0 ! imxvideoconvert_g2d rotation=3 ! kmssink can-scale=false sync=false&lt;/P&gt;&lt;P&gt;I get following error:&lt;/P&gt;&lt;P&gt;root@amrum-fumu1-imx8mp-2:~#&lt;BR /&gt;root@imx8mp:~# [ 56.241970] viv_post_event: unsubscribed event id =14 type=0x08002000&lt;BR /&gt;[ 105.490628] enter isp_mi_stop&lt;/P&gt;&lt;P&gt;Please find my device tree attached.&lt;/P&gt;&lt;P&gt;I also tried variations of ISI settings (isi_0 = okay) with no success.&lt;/P&gt;&lt;P&gt;It seems some sort of software adaptation needs to be done as well. Do you know what needs to be changed to make ISI work?&lt;/P&gt;&lt;P&gt;Thx, MC&lt;/P&gt;</description>
      <pubDate>Mon, 07 Mar 2022 11:22:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1423891#M187887</guid>
      <dc:creator>malik_cisse</dc:creator>
      <dc:date>2022-03-07T11:22:33Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP use both ISI and ISP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1423892#M187888</link>
      <description>&lt;P&gt;obviously dt file could not be sent.&lt;/P&gt;&lt;P&gt;Here the important part:&lt;/P&gt;&lt;P&gt;&amp;amp;i2c3 {&lt;BR /&gt;cam1: camera1@1a {&lt;BR /&gt;compatible = "sony,imx477";&lt;BR /&gt;reg = &amp;lt;0x1a&amp;gt;;&lt;BR /&gt;#address-cells = &amp;lt;0x1&amp;gt;;&lt;BR /&gt;#size-cells = &amp;lt;0x0&amp;gt;;&lt;BR /&gt;clocks = &amp;lt;&amp;amp;cam1_clk&amp;gt;;&lt;BR /&gt;clock-names = "ext";&lt;BR /&gt;pw-enable-gpios = &amp;lt;&amp;amp;gpio1 14 GPIO_ACTIVE_HIGH&amp;gt;;&lt;/P&gt;&lt;P&gt;port {&lt;BR /&gt;cam1_mipi_ep: endpoint {&lt;BR /&gt;csi-port = &amp;lt;0&amp;gt;;&lt;BR /&gt;bus-width = &amp;lt;4&amp;gt;;&lt;BR /&gt;remote-endpoint = &amp;lt;&amp;amp;mipi_csi0_ep&amp;gt;;&lt;BR /&gt;bus-type = &amp;lt;4&amp;gt;; /* MIPI CSI-2 D-PHY */&lt;BR /&gt;data-lanes = &amp;lt;1 2 3 4&amp;gt;;&lt;BR /&gt;clock-lanes = &amp;lt;0&amp;gt;;&lt;BR /&gt;clock-noncontinuous = &amp;lt;1&amp;gt;;&lt;BR /&gt;link-frequencies =&lt;BR /&gt;/bits/ 64 &amp;lt;750000000&amp;gt;;&lt;BR /&gt;};&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;};&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;isi_0 {&lt;BR /&gt;status = "disabled";&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&amp;amp;isi_1 {&lt;BR /&gt;status = "okay";&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;isp_0 {&lt;BR /&gt;status = "okay";&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;dewarp {&lt;BR /&gt;status = "okay";&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;mipi_csi_1 {&lt;BR /&gt;status = "okay";&lt;BR /&gt;};&lt;/P&gt;</description>
      <pubDate>Mon, 07 Mar 2022 11:23:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1423892#M187888</guid>
      <dc:creator>malik_cisse</dc:creator>
      <dc:date>2022-03-07T11:23:26Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP use both ISI and ISP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1423942#M187892</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am allowed to share some personal thought on this subject :&lt;/P&gt;&lt;BLOCKQUOTE&gt;&lt;P&gt;you can select version on the top right corner, try again&lt;/P&gt;&lt;P&gt;"&lt;A href="https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-evk-basler-ov5640.dts?h=lf-5.10.y" target="_blank" rel="nofollow noopener noreferrer"&gt;https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mp-evk-b...&lt;/A&gt;"&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;The solution proposed by &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/39586"&gt;@joanxie&lt;/a&gt; seems to be with 2 independent pipelines :&lt;/P&gt;&lt;P&gt;1. Basler camera --&amp;gt; MIPI0&amp;nbsp; --&amp;gt; ISP0&lt;BR /&gt;2. OV5640 camera --&amp;gt; MIPI1 --&amp;gt; ISI1&lt;/P&gt;&lt;P&gt;Meanwhile, I would guess that &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/109210"&gt;@malik_cisse&lt;/a&gt; expects to be able to access simultaneously different /dev/videoX and&amp;nbsp;/dev/videoY for the same input camera :&lt;/P&gt;&lt;P&gt;a. IMX477 --&amp;gt; MIPIx&amp;nbsp; ---&amp;gt; ISPx (bypass the demosiacing for having RAW bayer output on /dev/videoX)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; |&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; +--&amp;gt; ISPy (YUV output on /dev/videoY)&lt;/P&gt;&lt;P&gt;b. IMX477 --&amp;gt; MIPIx&amp;nbsp; ---&amp;gt; ISIx (RAW bayer output on /dev/videoX)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; |&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; +--&amp;gt; ISPx (YUV output on /dev/videoY)&lt;/P&gt;&lt;P&gt;c. IMX477 --&amp;gt; MIPIx --&amp;gt; ISIx&amp;nbsp; --&amp;gt; ISPx (YUV output on /dev/videoX)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; |&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; +--&amp;gt;&amp;nbsp;RAW bayer output on /dev/videoY&lt;/P&gt;&lt;P&gt;d. IMX477 --&amp;gt; MIPIx --&amp;gt; ISIx --&amp;gt; ISPy (YUV output on /dev/videoY)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; |&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; + --&amp;gt; RAW bayer output&amp;nbsp;on /dev/videoX&lt;/P&gt;&lt;P&gt;However, I think that neither of above a, b, c, d is feasible.&lt;/P&gt;&lt;BLOCKQUOTE&gt;&lt;P&gt;not sure if it will answer your question, but in theory one CSI2 channel can output to ISI and ISP at the same time. It should look like this:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; |------------------------&amp;gt; ISI0&lt;/P&gt;&lt;P&gt;CSI2 --------&amp;gt;| (no need any operation of register for this mux)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; |-------------------------&amp;gt; ISP0&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;Moreover, I am not sure if the above theory of &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/183729"&gt;@dianapredescu&lt;/a&gt; (which is same to above case b) works since I haven't seen similar configuration in any reference dts until now.&lt;/P&gt;&lt;P&gt;And the following application note is only limited at single MIPI to dual ISIs, but no info about ISP : &lt;A href="https://www.nxp.com/docs/en/application-note/AN13430.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/application-note/AN13430.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;BR /&gt;K.&lt;/P&gt;</description>
      <pubDate>Mon, 07 Mar 2022 14:24:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1423942#M187892</guid>
      <dc:creator>khang_letruong</dc:creator>
      <dc:date>2022-03-07T14:24:22Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP use both ISI and ISP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1423978#M187897</link>
      <description>&lt;P&gt;Thank you Khang for bringing this to the point so necelly.&lt;BR /&gt;This is exactly what I am trying to do. Any of the scenarios you have pointed out would unlock my issue if they would work.&lt;BR /&gt;I can also imagine that many people will have similar issue.&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/t5/user/viewprofilepage/user-id/183729" target="_blank"&gt;@dianapredescu:&amp;nbsp;&lt;/A&gt;Your statement saying that "&lt;SPAN&gt;CSI2 channel can output to ISI and ISP at the same time&lt;/SPAN&gt;" is indeed very interesting but as Khang also pointed out there is no actual proof this is feasible. At least it is not feasible by device tree tweaking only.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Any actual working examples would really be appreciated.&lt;/P&gt;&lt;P&gt;BR, MC&lt;/P&gt;</description>
      <pubDate>Mon, 07 Mar 2022 14:39:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1423978#M187897</guid>
      <dc:creator>malik_cisse</dc:creator>
      <dc:date>2022-03-07T14:39:41Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP use both ISI and ISP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1423990#M187899</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Another hypothesis which could be more feasible :&lt;/P&gt;&lt;BLOCKQUOTE&gt;&lt;P&gt;And the following application note is only limited at single MIPI to dual ISIs, but no info about ISP : &lt;A href="https://www.nxp.com/docs/en/application-note/AN13430.pdf" target="_blank" rel="nofollow noopener noreferrer"&gt;https://www.nxp.com/docs/en/application-note/AN13430.pdf&lt;/A&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;Combining the scenario in the above application note :&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; |------------------------&amp;gt; ISI0&lt;BR /&gt;CSI2 --------&amp;gt;|&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; |-------------------------&amp;gt; ISI&lt;STRONG&gt;&lt;FONT color="#0000FF"&gt;1&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;and the theory of &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/183729"&gt;@dianapredescu&lt;/a&gt; :&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; |------------------------&amp;gt; ISI0&lt;/P&gt;&lt;P&gt;CSI2 --------&amp;gt;| (no need any operation of register for this mux)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; |-------------------------&amp;gt; IS&lt;STRONG&gt;&lt;FONT color="#0000FF"&gt;P&lt;/FONT&gt;&lt;/STRONG&gt;0&lt;/P&gt;&lt;P&gt;I do hope hope that below configuration would be supported in future :&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; |------------------------&amp;gt; ISI0&lt;BR /&gt;CSI2 --------&amp;gt;|&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; |-------------------------&amp;gt; IS&lt;FONT color="#0000FF"&gt;&lt;STRONG&gt;P1&lt;/STRONG&gt;&lt;/FONT&gt; (with the fact from the mentioned application note that output of MIPI-CSI2 can be hooked to ISI1, why couldn't it be hooked to ISP1 as in current single pipeline ? )&lt;/P&gt;&lt;P&gt;Best Regards,&lt;BR /&gt;K.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 07 Mar 2022 15:14:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1423990#M187899</guid>
      <dc:creator>khang_letruong</dc:creator>
      <dc:date>2022-03-07T15:14:09Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP use both ISI and ISP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1423991#M187900</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/109210"&gt;@malik_cisse&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;The only thing I tested myself personally was:&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;|------------------------&amp;gt;&amp;nbsp; ISI0&lt;/P&gt;
&lt;P&gt;CSI2 ---&amp;gt; ISP0--------&amp;gt;|&amp;nbsp; &amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;|-------------------------&amp;gt; ISI1&lt;/P&gt;
&lt;P&gt;But that was possible because ISI can have as input CSI2 or AXI Memory, and used the m2m functionality of ISI.&lt;/P&gt;
&lt;P&gt;The scenarios &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/147542"&gt;@khang_letruong&lt;/a&gt;&amp;nbsp;(btw thanks for explaining the use case) mentioned, indeed not sure if are feasible because looking at the 8MP RM it is stated:&amp;nbsp;&lt;/P&gt;
&lt;BLOCKQUOTE&gt;
&lt;P&gt;There are two instances of ISP on the chip and each is connected to separate instances of&lt;BR /&gt;MIPI CSI.&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;
&lt;P&gt;So my understanding would be that I can't have the ISP input coming from anywhere else but camera sensor.&lt;/P&gt;
&lt;P&gt;But let me look into the possibility I mentioned few messages above to see if it actually works and if we have some examples.&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Diana&lt;/P&gt;</description>
      <pubDate>Mon, 07 Mar 2022 15:33:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1423991#M187900</guid>
      <dc:creator>dianapredescu</dc:creator>
      <dc:date>2022-03-07T15:33:53Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP use both ISI and ISP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1423994#M187901</link>
      <description>&lt;P&gt;Dear &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/183729"&gt;@dianapredescu&lt;/a&gt; ,&lt;/P&gt;&lt;BLOCKQUOTE&gt;&lt;P&gt;The only thing I tested myself personally was:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; |------------------------&amp;gt; ISI0&lt;/P&gt;&lt;P&gt;CSI2 ---&amp;gt; ISP0--------&amp;gt;|&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; |-------------------------&amp;gt; ISI1&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;Are you sure that the above configuration works (i.e hooking the output of ISP to ISI) since it seems to be impossible within the following discussion :&amp;nbsp; &lt;A href="https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-ISI-with-ISP/m-p/1376237" target="_blank" rel="noopener"&gt;https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-ISI-with-ISP/m-p/1376237&lt;/A&gt;&lt;/P&gt;&lt;P&gt;Can you confirm ?&lt;/P&gt;&lt;P&gt;Thanks and regards,&lt;BR /&gt;K.&lt;/P&gt;</description>
      <pubDate>Mon, 07 Mar 2022 15:21:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1423994#M187901</guid>
      <dc:creator>khang_letruong</dc:creator>
      <dc:date>2022-03-07T15:21:50Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP use both ISI and ISP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1423999#M187902</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/147542"&gt;@khang_letruong&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;I did some experiments few days ago, so here is what I have noticed:&lt;/P&gt;
&lt;P&gt;I edited a bit&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;EM&gt;imx8mp.dtsi&lt;/EM&gt;&amp;nbsp;file to configure isi_1 as m2m device too. I modified &lt;EM&gt;imx8mp-evk-basler-ov5640.dtb&amp;nbsp;&lt;/EM&gt;to enable isi_1, isi_0 and isp_0. After booting the board I am able to find the Gstreamer plugin for m2m:&lt;/P&gt;
&lt;BLOCKQUOTE&gt;
&lt;P&gt;root@imx8mpevk:~# gst-inspect-1.0 | grep v4l2&lt;BR /&gt;video4linux2: v4l2src: Video (video4linux2) Source&lt;BR /&gt;video4linux2: v4l2sink: Video (video4linux2) Sink&lt;BR /&gt;video4linux2: v4l2radio: Radio (video4linux2) Tuner&lt;BR /&gt;video4linux2: v4l2deviceprovider (GstDeviceProviderFactory)&lt;BR /&gt;&lt;STRONG&gt;video4linux2: v4l2convert: V4L2 Video Converter&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;video4linux2: v4l2video3convert: V4L2 Video Converter&lt;/STRONG&gt;&lt;BR /&gt;video4linux2: v4l2h264enc: V4L2 H.264 Encoder&lt;BR /&gt;video4linux2: v4l2h265enc: V4L2 H.265 Encoder&lt;BR /&gt;video4linux2: v4l2h264dec: V4L2 H264 Decoder&lt;BR /&gt;video4linux2: v4l2h265dec: V4L2 H265 Decoder&lt;BR /&gt;video4linux2: v4l2vp8dec: V4L2 VP8 Decoder&lt;BR /&gt;video4linux2: v4l2vp9dec: V4L2 VP9 Decoder&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;
&lt;P&gt;as well as the m2m_devices:&lt;/P&gt;
&lt;BLOCKQUOTE&gt;
&lt;P&gt;root@imx8mpevk:~# v4l2-ctl --list-devices&lt;/P&gt;
&lt;P&gt;mxc-isi-m2m (platform:32e00000.isi:m2m_devic):&lt;BR /&gt;/dev/video2&lt;/P&gt;
&lt;P&gt;mxc-isi-m2m (platform:32e02000.isi:m2m_devic):&lt;BR /&gt;/dev/video3&lt;/P&gt;
&lt;P&gt;VIV (platform:viv0):&lt;BR /&gt;/dev/video5&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;
&lt;P&gt;So I created a quick pipeline and redirected isp_0 to both isi_0 and isi_1.&lt;/P&gt;
&lt;BLOCKQUOTE&gt;
&lt;P&gt;gst-launch-1.0 v4l2src device=/dev/video5 num-buffers=20 ! video/x-raw, width=1920, height=1080, framerate=60/1 ! tee name=t ! queue ! v4l2convert ! video/x-raw, width=1920, height=1080, format=RGB16 ! vpuenc_h264 ! queue ! filesink location=out1.h264 t. ! queue ! v4l2video3convert ! video/x-raw, width=1280, height=720, format=BGRA ! vpuenc_h264 ! queue ! filesink location=out2.h264&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;
&lt;P&gt;In my case v4l2convert will use /dev/video2 which is mapped to isi_0 and v4l2video3convert will use /dev/video3 which corresponds to isi_1. Used the tee element which splits the data in 2 identical ways, so at the end I have 1920x1080 and 1280x720 video streams.&lt;/P&gt;
&lt;P&gt;Let me know if this is helpful.&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Diana&lt;/P&gt;</description>
      <pubDate>Mon, 07 Mar 2022 15:30:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1423999#M187902</guid>
      <dc:creator>dianapredescu</dc:creator>
      <dc:date>2022-03-07T15:30:54Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP use both ISI and ISP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1424009#M187903</link>
      <description>&lt;P&gt;Dear &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/183729"&gt;@dianapredescu&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for the confirmation. But still data behind ISP cannot be read, and this configuration seems "heavier" than one proposed in this application note &lt;A href="https://www.nxp.com/docs/en/application-note/AN13430.pdf" target="_blank" rel="nofollow noopener noreferrer"&gt;https://www.nxp.com/docs/en/application-note/AN13430.pdf&lt;/A&gt;&amp;nbsp; with intermediate ISP btw MIPI-CSI2 and ISI(s).&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Khang&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 07 Mar 2022 15:44:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1424009#M187903</guid>
      <dc:creator>khang_letruong</dc:creator>
      <dc:date>2022-03-07T15:44:48Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MP use both ISI and ISP</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1424023#M187905</link>
      <description>&lt;P&gt;Hi Diana,&lt;/P&gt;&lt;P&gt;This is getting very interesting.&lt;/P&gt;&lt;P&gt;I learned something in your and Khang's feedback: One can configure ISI to do m2m access as can be seen in &lt;A href="https://www.nxp.com/docs/en/application-note/AN13430.pdf" target="_blank" rel="nofollow noopener noreferrer"&gt;https://www.nxp.com/docs/en/application-note/AN13430.pdf&lt;/A&gt; page 3&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;isi &lt;SPAN class=""&gt;interface = &amp;lt;5 0 2&amp;gt;.&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;SPAN class=""&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="isi_m2m.jpg" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/172662i6268FBA9195A2B80/image-size/large?v=v2&amp;amp;px=999" role="button" title="isi_m2m.jpg" alt="isi_m2m.jpg" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;However your example is not useful for two reasons:&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;you are using isi0 and isi1 to convert YUV to RGB just before encoding in H.264. This does not make sense because H.264 encoder uses YUV420 input already.&lt;/LI&gt;&lt;LI&gt;The imx8mp GPU can do yuv to RGB conversion. No need for isi for this&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;For me isi only makes sense when connected to CSI directly but unfortunately we cannot seem to connect both isi and isp to CSI at the same time as in your earlier post:&lt;/P&gt;&lt;P&gt;&lt;EM&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; |------------------------&amp;gt;&amp;nbsp; ISI0&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;EM&gt;CSI2 --------&amp;gt;|&amp;nbsp;&amp;nbsp; (no need any operation of register for this mux)&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;EM&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; |-------------------------&amp;gt; ISP0&lt;/EM&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 07 Mar 2022 16:18:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MP-use-both-ISI-and-ISP/m-p/1424023#M187905</guid>
      <dc:creator>malik_cisse</dc:creator>
      <dc:date>2022-03-07T16:18:06Z</dc:date>
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