i.MX Processors中的主题 GPIO to RAM using DMA?

GPIO to RAM using DMA?

fgrieu — Tue, 15 Feb 2022 05:09:02 GMT

I'm considering connecting a 12-bit ~50 MHz parallel A/D (e.g. AD9235) to GPIOs of an MIMXRT1062, getting the samples to RAM using DMA. I need "ping/pong" mode so that the CPU can process half of the RAM buffer while the next is acquired, with no gap.

Is there some resource (appnote) that will help? I admit I'm intimidated by chapters 60-63 of the i.MX RT1060 Processor Reference Manual, describing the chip cross triggers.

Re: GPIO to RAM using DMA?

jingpan — Thu, 17 Feb 2022 03:02:56 GMT

Hi @fgrieu ,

There isn't a example which can fit for your case. But in SDK, there is a EDMA ping-ping buffer demo you can refer to. It transfer data from buffer to buffer. You can modify its transfer type to kEDMA_PeripheralToMemory.

You want to use XBAR to trig dma transfer? I think the XBAR input should from a timer and XBAR_OUT00 is to a DMA MUX. Please refer to the XBAR demo in SDK.

Regards,

Jing

Re: GPIO to RAM using DMA?

fgrieu — Thu, 17 Feb 2022 14:05:22 GMT

Hi jingpan,

thanks for pointing me to this demo which seems an excellent starting point:
SDK_2_11_0_MIMXRT1062xxxxA/boards/evkbmimxrt1060/driver_examples/edma/ping_pong_transfer/edma_ping_pong_transfer.c

I'm not trying to use XBAR to trig DMA transfer; I'm fearing having to mess with it to create a data path from GPIOs to RAM thru eDMA. If somewhat I do not, or some existing code does it form me, that's best.

One thing I do not get is how I synchronize the DMA. I need a 50 or 48 MHz clock generated by the CPU, and sample the GPIOs at the rising edge of that (the data is valid except from 2 to 10 ns after the rising edge).

Regards, fgrieu

Re: GPIO to RAM using DMA?

jingpan — Fri, 18 Feb 2022 05:38:13 GMT

Hi @fgrieu ,

The 48~50Mhz trig signal should comes from QTIMER or FlexPWM. They can trig DMA.

Regards,

jing