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    <title>i.MX Processors中的主题 iMX8MM Mini custom board DDR test problem</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/iMX8MM-Mini-custom-board-DDR-test-problem/m-p/1411822#M186863</link>
    <description>&lt;P&gt;We can use the script to do the DDR calibration and stress test successfully. But error happens on one board. The log shows&lt;/P&gt;&lt;P&gt;Downloading file 'bin\lpddr4_train1d_string_v201709.bin' ..Done&lt;/P&gt;&lt;P&gt;Downloading file 'bin\lpddr4_train2d_string_v201709.bin' ..Done&lt;/P&gt;&lt;P&gt;Downloading file 'bin\lpddr4_imem_1d_v201709.bin' ..Done&lt;/P&gt;&lt;P&gt;Downloading file 'bin\lpddr4_dmem_1d_v201709.bin' ..Done&lt;/P&gt;&lt;P&gt;Downloading file 'bin\lpddr4_imem_2d_v201709.bin' ..Done&lt;/P&gt;&lt;P&gt;Downloading file 'bin\lpddr4_dmem_2d_v201709.bin' ..Done&lt;/P&gt;&lt;P&gt;Downloading IVT header...Done&lt;BR /&gt;Downloading file 'bin\m845s_ddr_stress_test.bin' ...Done&lt;/P&gt;&lt;P&gt;Download is complete&lt;BR /&gt;Waiting for the target board boot...&lt;/P&gt;&lt;P&gt;===================hardware_init=====================&lt;BR /&gt;hardware_init exit&lt;/P&gt;&lt;P&gt;*************************************************************************&lt;/P&gt;&lt;P&gt;*************************************************************************&lt;/P&gt;&lt;P&gt;*************************************************************************&lt;BR /&gt;MX8 DDR Stress Test V3.30&lt;BR /&gt;Built on Nov 24 2021 13:30:14&lt;BR /&gt;*************************************************************************&lt;/P&gt;&lt;P&gt;Waiting for board configuration from PC-end...&lt;/P&gt;&lt;P&gt;--Set up the MMU and enable I and D cache--&lt;BR /&gt;- This is the Cortex-A53 core&lt;BR /&gt;- Check if I cache is enabled&lt;BR /&gt;- Enabling I cache since it was disabled&lt;BR /&gt;- Push base address of TTB to TTBR0_EL3&lt;BR /&gt;- Config TCR_EL3&lt;BR /&gt;- Config MAIR_EL3&lt;BR /&gt;- Enable MMU&lt;BR /&gt;- Data Cache has been enabled&lt;BR /&gt;- Check system memory register, only for debug&lt;/P&gt;&lt;P&gt;- VMCR Check:&lt;BR /&gt;- ttbr0_el3: 0x93d000&lt;BR /&gt;- tcr_el3: 0x2051c&lt;BR /&gt;- mair_el3: 0x774400&lt;BR /&gt;- sctlr_el3: 0xc01815&lt;BR /&gt;- id_aa64mmfr0_el1: 0x1122&lt;/P&gt;&lt;P&gt;- MMU and cache setup complete&lt;/P&gt;&lt;P&gt;*************************************************************************&lt;BR /&gt;ARM clock(CA53) rate: 1800MHz&lt;BR /&gt;DDR Clock: 1500MHz&lt;/P&gt;&lt;P&gt;============================================&lt;BR /&gt;DDR configuration&lt;BR /&gt;DDR type is LPDDR4&lt;BR /&gt;Data width: 32, bank num: 8&lt;BR /&gt;Row size: 15, col size: 10&lt;BR /&gt;One chip select is used&lt;BR /&gt;Number of DDR controllers used on the SoC: 1&lt;BR /&gt;Density per chip select: 1024MB&lt;BR /&gt;Density per controller is: 1024MB&lt;BR /&gt;Total density detected on the board is: 1024MB&lt;BR /&gt;============================================&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Please re-download with the correct value&lt;/P&gt;&lt;P&gt;Does anyone have hints what's going wrong?&lt;/P&gt;&lt;P&gt;Thanks in advance.&lt;/P&gt;</description>
    <pubDate>Thu, 10 Feb 2022 12:39:42 GMT</pubDate>
    <dc:creator>raymondman</dc:creator>
    <dc:date>2022-02-10T12:39:42Z</dc:date>
    <item>
      <title>iMX8MM Mini custom board DDR test problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8MM-Mini-custom-board-DDR-test-problem/m-p/1411822#M186863</link>
      <description>&lt;P&gt;We can use the script to do the DDR calibration and stress test successfully. But error happens on one board. The log shows&lt;/P&gt;&lt;P&gt;Downloading file 'bin\lpddr4_train1d_string_v201709.bin' ..Done&lt;/P&gt;&lt;P&gt;Downloading file 'bin\lpddr4_train2d_string_v201709.bin' ..Done&lt;/P&gt;&lt;P&gt;Downloading file 'bin\lpddr4_imem_1d_v201709.bin' ..Done&lt;/P&gt;&lt;P&gt;Downloading file 'bin\lpddr4_dmem_1d_v201709.bin' ..Done&lt;/P&gt;&lt;P&gt;Downloading file 'bin\lpddr4_imem_2d_v201709.bin' ..Done&lt;/P&gt;&lt;P&gt;Downloading file 'bin\lpddr4_dmem_2d_v201709.bin' ..Done&lt;/P&gt;&lt;P&gt;Downloading IVT header...Done&lt;BR /&gt;Downloading file 'bin\m845s_ddr_stress_test.bin' ...Done&lt;/P&gt;&lt;P&gt;Download is complete&lt;BR /&gt;Waiting for the target board boot...&lt;/P&gt;&lt;P&gt;===================hardware_init=====================&lt;BR /&gt;hardware_init exit&lt;/P&gt;&lt;P&gt;*************************************************************************&lt;/P&gt;&lt;P&gt;*************************************************************************&lt;/P&gt;&lt;P&gt;*************************************************************************&lt;BR /&gt;MX8 DDR Stress Test V3.30&lt;BR /&gt;Built on Nov 24 2021 13:30:14&lt;BR /&gt;*************************************************************************&lt;/P&gt;&lt;P&gt;Waiting for board configuration from PC-end...&lt;/P&gt;&lt;P&gt;--Set up the MMU and enable I and D cache--&lt;BR /&gt;- This is the Cortex-A53 core&lt;BR /&gt;- Check if I cache is enabled&lt;BR /&gt;- Enabling I cache since it was disabled&lt;BR /&gt;- Push base address of TTB to TTBR0_EL3&lt;BR /&gt;- Config TCR_EL3&lt;BR /&gt;- Config MAIR_EL3&lt;BR /&gt;- Enable MMU&lt;BR /&gt;- Data Cache has been enabled&lt;BR /&gt;- Check system memory register, only for debug&lt;/P&gt;&lt;P&gt;- VMCR Check:&lt;BR /&gt;- ttbr0_el3: 0x93d000&lt;BR /&gt;- tcr_el3: 0x2051c&lt;BR /&gt;- mair_el3: 0x774400&lt;BR /&gt;- sctlr_el3: 0xc01815&lt;BR /&gt;- id_aa64mmfr0_el1: 0x1122&lt;/P&gt;&lt;P&gt;- MMU and cache setup complete&lt;/P&gt;&lt;P&gt;*************************************************************************&lt;BR /&gt;ARM clock(CA53) rate: 1800MHz&lt;BR /&gt;DDR Clock: 1500MHz&lt;/P&gt;&lt;P&gt;============================================&lt;BR /&gt;DDR configuration&lt;BR /&gt;DDR type is LPDDR4&lt;BR /&gt;Data width: 32, bank num: 8&lt;BR /&gt;Row size: 15, col size: 10&lt;BR /&gt;One chip select is used&lt;BR /&gt;Number of DDR controllers used on the SoC: 1&lt;BR /&gt;Density per chip select: 1024MB&lt;BR /&gt;Density per controller is: 1024MB&lt;BR /&gt;Total density detected on the board is: 1024MB&lt;BR /&gt;============================================&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Please re-download with the correct value&lt;/P&gt;&lt;P&gt;Does anyone have hints what's going wrong?&lt;/P&gt;&lt;P&gt;Thanks in advance.&lt;/P&gt;</description>
      <pubDate>Thu, 10 Feb 2022 12:39:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8MM-Mini-custom-board-DDR-test-problem/m-p/1411822#M186863</guid>
      <dc:creator>raymondman</dc:creator>
      <dc:date>2022-02-10T12:39:42Z</dc:date>
    </item>
    <item>
      <title>iMX8MM Mini custom board DDR test problem</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8MM-Mini-custom-board-DDR-test-problem/m-p/1418690#M187434</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/115929"&gt;@raymondman&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;As this error is just showing up in one board, review the connections of the DDR&amp;nbsp; to the processor just to discard any issue on the manufacturing part.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Israel.&lt;/P&gt;</description>
      <pubDate>Thu, 24 Feb 2022 02:25:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8MM-Mini-custom-board-DDR-test-problem/m-p/1418690#M187434</guid>
      <dc:creator>nxf63675</dc:creator>
      <dc:date>2022-02-24T02:25:51Z</dc:date>
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