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    <title>topic Re: i.MX8 QuadXPlus GPIO configuration in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-QuadXPlus-GPIO-configuration/m-p/1407394#M186522</link>
    <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/147495"&gt;@nagarajan-r&lt;/a&gt;&amp;nbsp;&lt;BR /&gt;Hello,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp; I've sent some comments directly.&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt;Yuri.&lt;/P&gt;</description>
    <pubDate>Tue, 01 Feb 2022 05:48:40 GMT</pubDate>
    <dc:creator>Yuri</dc:creator>
    <dc:date>2022-02-01T05:48:40Z</dc:date>
    <item>
      <title>i.MX8 QuadXPlus GPIO configuration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-QuadXPlus-GPIO-configuration/m-p/1404411#M186238</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I have been using i.MX8 QuadXPlus MEK Evaluation board running on QNX 7.1 RTOS.&lt;/P&gt;&lt;P&gt;I am able to boot the board in QNX 7.1 with the BSP provided the qnx for this board.&lt;/P&gt;&lt;P&gt;the below code is part of the Startup program present in QNX 7.1 BSP.&lt;/P&gt;&lt;P&gt;imx_pad_t pads[] = {&lt;/P&gt;&lt;P&gt;{SC_P_PCIE_CTRL0_WAKE_B, IMX_PAD_ALT_4, SC_PAD_CONFIG_NORMAL, SC_PAD_ISO_OFF, SC_PAD_28FDSOI_DSE_DV_LOW, SC_PAD_28FDSOI_PS_NONE}, }&lt;/P&gt;&lt;P&gt;set_28fdsoi_pad(startup_data-&amp;gt;ipc, &amp;amp;pads[0], sizeof(pads) / sizeof(imx_pad_t));&lt;/P&gt;&lt;P&gt;the above function calls the below 2 functions.&lt;/P&gt;&lt;P&gt;sc_pad_set_mux(ipc, pads[i].pad, pads[i].mux, pads[i].cfg, pads[i].iso);&lt;/P&gt;&lt;P&gt;sc_pad_set_gp_28fdsoi(ipc, pads[i].pad, pads[i].dse, pads[i].ps);&lt;/P&gt;&lt;P&gt;once the mux configuration is done, i am calling the application code&amp;nbsp;&lt;/P&gt;&lt;P&gt;out32(gpio4_base + IMX_GPIO_GDIR, (in32(gpio4_base + IMX_GPIO_GDIR) &amp;amp; ~(0x01 &amp;lt;&amp;lt; 2)));&lt;/P&gt;&lt;P&gt;if((0x01 &amp;lt;&amp;lt; 2) &amp;amp; in32(gpio4_base + IMX_GPIO_DR))&lt;BR /&gt;{&lt;BR /&gt;printf("PCIE_CTRL0_WAKE_B is set\n");&lt;BR /&gt;}&lt;BR /&gt;else&lt;BR /&gt;{&lt;BR /&gt;printf("PCIE_CTRL0_WAKE_B is not set\n");&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;observation: even though this GPIO pin is pulled high by default, this code always reads low. I am unable to figure out what is the issue. Any support on this is really appreciated.&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Nagaraj&lt;/P&gt;</description>
      <pubDate>Tue, 25 Jan 2022 08:04:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-QuadXPlus-GPIO-configuration/m-p/1404411#M186238</guid>
      <dc:creator>nagarajan-r</dc:creator>
      <dc:date>2022-01-25T08:04:07Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8 QuadXPlus GPIO configuration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8-QuadXPlus-GPIO-configuration/m-p/1407394#M186522</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/147495"&gt;@nagarajan-r&lt;/a&gt;&amp;nbsp;&lt;BR /&gt;Hello,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp; I've sent some comments directly.&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt;Yuri.&lt;/P&gt;</description>
      <pubDate>Tue, 01 Feb 2022 05:48:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8-QuadXPlus-GPIO-configuration/m-p/1407394#M186522</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2022-02-01T05:48:40Z</dc:date>
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