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    <title>topic i.MX8xQuadPlus UART1_RX GPIO usage in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8xQuadPlus-UART1-RX-GPIO-usage/m-p/1395771#M185488</link>
    <description>&lt;P&gt;I'm trying to use UART1_RX (ball L31) on an i.MX8XQuadPlus processor. I have the device tree pinctrl setup as follows:&lt;/P&gt;&lt;P&gt;IMX8QXP_UART1_RX_LSIO_GPT1_CLK 0x26000060 // IMX8_FREQ_IN&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nlbutts_0-1641498866484.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/166932i31F4FD0C84640758/image-size/medium?v=v2&amp;amp;px=400" role="button" title="nlbutts_0-1641498866484.png" alt="nlbutts_0-1641498866484.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nlbutts_1-1641498873578.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/166933iB6CA2768161609FA/image-size/medium?v=v2&amp;amp;px=400" role="button" title="nlbutts_1-1641498873578.png" alt="nlbutts_1-1641498873578.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;This should be GPIO0 pin 22:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nlbutts_2-1641498891607.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/166934i5F046BA36E3D8F3E/image-size/medium?v=v2&amp;amp;px=400" role="button" title="nlbutts_2-1641498891607.png" alt="nlbutts_2-1641498891607.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have a 1 Hz square wave being fed into this pin.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nlbutts_3-1641498954455.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/166935iD25A9E83FA6D7256/image-size/medium?v=v2&amp;amp;px=400" role="button" title="nlbutts_3-1641498954455.png" alt="nlbutts_3-1641498954455.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;But when I try to read this pin in Linux it always reads low:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;root@imx8qxpdeere:~# gpioget gpiochip0 22
0
root@imx8qxpdeere:~# gpioget gpiochip0 22
0
root@imx8qxpdeere:~# gpioget gpiochip0 22
0
root@imx8qxpdeere:~# gpioget gpiochip0 22
0
root@imx8qxpdeere:~# gpioget gpiochip0 22
0
root@imx8qxpdeere:~# gpioget gpiochip0 22
0
root@imx8qxpdeere:~# gpioget gpiochip0 22
0&lt;/LI-CODE&gt;&lt;P&gt;I looked through the errata and didn't see any mention of a GPIO pin.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Any ideas?&lt;/P&gt;</description>
    <pubDate>Thu, 06 Jan 2022 19:57:07 GMT</pubDate>
    <dc:creator>nlbutts</dc:creator>
    <dc:date>2022-01-06T19:57:07Z</dc:date>
    <item>
      <title>i.MX8xQuadPlus UART1_RX GPIO usage</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8xQuadPlus-UART1-RX-GPIO-usage/m-p/1395771#M185488</link>
      <description>&lt;P&gt;I'm trying to use UART1_RX (ball L31) on an i.MX8XQuadPlus processor. I have the device tree pinctrl setup as follows:&lt;/P&gt;&lt;P&gt;IMX8QXP_UART1_RX_LSIO_GPT1_CLK 0x26000060 // IMX8_FREQ_IN&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nlbutts_0-1641498866484.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/166932i31F4FD0C84640758/image-size/medium?v=v2&amp;amp;px=400" role="button" title="nlbutts_0-1641498866484.png" alt="nlbutts_0-1641498866484.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nlbutts_1-1641498873578.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/166933iB6CA2768161609FA/image-size/medium?v=v2&amp;amp;px=400" role="button" title="nlbutts_1-1641498873578.png" alt="nlbutts_1-1641498873578.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;This should be GPIO0 pin 22:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nlbutts_2-1641498891607.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/166934i5F046BA36E3D8F3E/image-size/medium?v=v2&amp;amp;px=400" role="button" title="nlbutts_2-1641498891607.png" alt="nlbutts_2-1641498891607.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have a 1 Hz square wave being fed into this pin.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nlbutts_3-1641498954455.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/166935iD25A9E83FA6D7256/image-size/medium?v=v2&amp;amp;px=400" role="button" title="nlbutts_3-1641498954455.png" alt="nlbutts_3-1641498954455.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;But when I try to read this pin in Linux it always reads low:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;root@imx8qxpdeere:~# gpioget gpiochip0 22
0
root@imx8qxpdeere:~# gpioget gpiochip0 22
0
root@imx8qxpdeere:~# gpioget gpiochip0 22
0
root@imx8qxpdeere:~# gpioget gpiochip0 22
0
root@imx8qxpdeere:~# gpioget gpiochip0 22
0
root@imx8qxpdeere:~# gpioget gpiochip0 22
0
root@imx8qxpdeere:~# gpioget gpiochip0 22
0&lt;/LI-CODE&gt;&lt;P&gt;I looked through the errata and didn't see any mention of a GPIO pin.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Any ideas?&lt;/P&gt;</description>
      <pubDate>Thu, 06 Jan 2022 19:57:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8xQuadPlus-UART1-RX-GPIO-usage/m-p/1395771#M185488</guid>
      <dc:creator>nlbutts</dc:creator>
      <dc:date>2022-01-06T19:57:07Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8xQuadPlus UART1_RX GPIO usage</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8xQuadPlus-UART1-RX-GPIO-usage/m-p/1395792#M185491</link>
      <description>&lt;P&gt;I had copied and pasted the wrong #define:&lt;/P&gt;&lt;P&gt;#define IMX8QXP_UART1_RX_LSIO_GPT1_CLK IMX8QXP_UART1_RX 3&lt;BR /&gt;#define IMX8QXP_UART1_RX_LSIO_GPIO0_IO22 IMX8QXP_UART1_RX 4&lt;/P&gt;&lt;P&gt;I used the former, when I meant to use the later.&lt;/P&gt;</description>
      <pubDate>Thu, 06 Jan 2022 22:04:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8xQuadPlus-UART1-RX-GPIO-usage/m-p/1395792#M185491</guid>
      <dc:creator>nlbutts</dc:creator>
      <dc:date>2022-01-06T22:04:00Z</dc:date>
    </item>
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