<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX ProcessorsのトピックRe: IMX8MQ mipi_csi Rx fifo overflow</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MQ-mipi-csi-Rx-fifo-overflow/m-p/1390349#M184821</link>
    <description>&lt;P&gt;Hi Cot&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;for Rx fifo overflow one can look at suggestions provided on&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/i-MX-Processors/RX-fifo-overflow-on-MIPI-CSI2-i-MX8MQ/m-p/1087697?commentID=1306949#comment-1306949" target="_blank"&gt;https://community.nxp.com/t5/i-MX-Processors/RX-fifo-overflow-on-MIPI-CSI2-i-MX8MQ/m-p/1087697?commentID=1306949#comment-1306949&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;</description>
    <pubDate>Wed, 22 Dec 2021 00:04:39 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2021-12-22T00:04:39Z</dc:date>
    <item>
      <title>IMX8MQ mipi_csi Rx fifo overflow</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MQ-mipi-csi-Rx-fifo-overflow/m-p/1390203#M184810</link>
      <description>&lt;P&gt;How to deal with the question?&lt;/P&gt;&lt;P&gt;mx6s-csi 30a90000.csi1_bridge: mx6s_csi_irq_handler Rx fifo overflow, 81244001&lt;/P&gt;&lt;P&gt;Now,mipi Input &lt;A href="mailto:1080P@60" target="_blank"&gt;1080P@60&lt;/A&gt;&amp;nbsp;(4 lanes and 891Mbps per lane)&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 21 Dec 2021 14:09:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MQ-mipi-csi-Rx-fifo-overflow/m-p/1390203#M184810</guid>
      <dc:creator>cotway</dc:creator>
      <dc:date>2021-12-21T14:09:17Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MQ mipi_csi Rx fifo overflow</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MQ-mipi-csi-Rx-fifo-overflow/m-p/1390349#M184821</link>
      <description>&lt;P&gt;Hi Cot&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;for Rx fifo overflow one can look at suggestions provided on&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/i-MX-Processors/RX-fifo-overflow-on-MIPI-CSI2-i-MX8MQ/m-p/1087697?commentID=1306949#comment-1306949" target="_blank"&gt;https://community.nxp.com/t5/i-MX-Processors/RX-fifo-overflow-on-MIPI-CSI2-i-MX8MQ/m-p/1087697?commentID=1306949#comment-1306949&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;</description>
      <pubDate>Wed, 22 Dec 2021 00:04:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MQ-mipi-csi-Rx-fifo-overflow/m-p/1390349#M184821</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2021-12-22T00:04:39Z</dc:date>
    </item>
  </channel>
</rss>

